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author | Dale Johannesen <dalej@apple.com> | 2008-09-04 00:47:13 +0000 |
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committer | Dale Johannesen <dalej@apple.com> | 2008-09-04 00:47:13 +0000 |
commit | 92b33088469bee2ea489b79574d26cd3847220ac (patch) | |
tree | 7e62bb84c50ffae40c064783557877066321ca40 /lib/Target/IA64/IA64ISelLowering.cpp | |
parent | 5ac35427d2e43a9f5eea212591e26cf2fa895eae (diff) | |
download | external_llvm-92b33088469bee2ea489b79574d26cd3847220ac.zip external_llvm-92b33088469bee2ea489b79574d26cd3847220ac.tar.gz external_llvm-92b33088469bee2ea489b79574d26cd3847220ac.tar.bz2 |
Add intrinsics for log, log2, log10, exp, exp2.
No functional change (and no FE change to generate them).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55753 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/IA64/IA64ISelLowering.cpp')
-rw-r--r-- | lib/Target/IA64/IA64ISelLowering.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp index 9cd9ef0..cdcacf3 100644 --- a/lib/Target/IA64/IA64ISelLowering.cpp +++ b/lib/Target/IA64/IA64ISelLowering.cpp @@ -75,10 +75,20 @@ IA64TargetLowering::IA64TargetLowering(TargetMachine &TM) setOperationAction(ISD::FCOS , MVT::f64, Expand); setOperationAction(ISD::FSQRT, MVT::f64, Expand); setOperationAction(ISD::FPOW , MVT::f64, Expand); + setOperationAction(ISD::FLOG , MVT::f64, Expand); + setOperationAction(ISD::FLOG2, MVT::f64, Expand); + setOperationAction(ISD::FLOG10,MVT::f64, Expand); + setOperationAction(ISD::FEXP , MVT::f64, Expand); + setOperationAction(ISD::FEXP2, MVT::f64, Expand); setOperationAction(ISD::FSIN , MVT::f32, Expand); setOperationAction(ISD::FCOS , MVT::f32, Expand); setOperationAction(ISD::FSQRT, MVT::f32, Expand); setOperationAction(ISD::FPOW , MVT::f32, Expand); + setOperationAction(ISD::FLOG , MVT::f32, Expand); + setOperationAction(ISD::FLOG2, MVT::f32, Expand); + setOperationAction(ISD::FLOG10,MVT::f32, Expand); + setOperationAction(ISD::FEXP , MVT::f32, Expand); + setOperationAction(ISD::FEXP2, MVT::f32, Expand); setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand); |