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author | Evan Cheng <evan.cheng@apple.com> | 2008-02-04 23:06:48 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2008-02-04 23:06:48 +0000 |
commit | 4e3f5a4e9c13f216856515e6f000881f2c850736 (patch) | |
tree | 1864bd1e96863458c4ba320b1d655c00c6fff8e7 /lib/Target/IA64 | |
parent | c451ac0a42f06355976e5d7d8bc45da16474e3f0 (diff) | |
download | external_llvm-4e3f5a4e9c13f216856515e6f000881f2c850736.zip external_llvm-4e3f5a4e9c13f216856515e6f000881f2c850736.tar.gz external_llvm-4e3f5a4e9c13f216856515e6f000881f2c850736.tar.bz2 |
Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46724 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/IA64')
-rw-r--r-- | lib/Target/IA64/IA64ISelDAGToDAG.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/lib/Target/IA64/IA64ISelDAGToDAG.cpp b/lib/Target/IA64/IA64ISelDAGToDAG.cpp index 1a9eae0..93ff8b4 100644 --- a/lib/Target/IA64/IA64ISelDAGToDAG.cpp +++ b/lib/Target/IA64/IA64ISelDAGToDAG.cpp @@ -18,7 +18,6 @@ #include "IA64ISelLowering.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/Target/TargetOptions.h" |