Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 12 insertions, 12 deletions

diff --git a/lib/Target/IA64/IA64ISelDAGToDAG.cpp b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
index f4b60af..8c38b75 100644
--- a/lib/Target/IA64/IA64ISelDAGToDAG.cpp
+++ b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
@@ -493,15 +493,15 @@ SDNode *IA64DAGToDAGISel::Select(SDOperand Op) {
                                 Address, Chain);
   }
   
-  case ISD::TRUNCSTORE:
   case ISD::STORE: {
-    SDOperand Address = N->getOperand(2);
-    SDOperand Chain = N->getOperand(0);
+    StoreSDNode *ST = cast<StoreSDNode>(N);
+    SDOperand Address = ST->getBasePtr();
+    SDOperand Chain = ST->getChain();
     AddToISelQueue(Address);
     AddToISelQueue(Chain);
    
     unsigned Opc;
-    if (N->getOpcode() == ISD::STORE) {
+    if (ISD::isNON_TRUNCStore(N)) {
       switch (N->getOperand(1).getValueType()) {
       default: assert(0 && "unknown type in store");
       case MVT::i1: { // this is a bool
@@ -510,7 +510,7 @@ SDNode *IA64DAGToDAGISel::Select(SDOperand Op) {
 	SDOperand Initial = CurDAG->getCopyFromReg(Chain, IA64::r0, MVT::i64);
 	Chain = Initial.getValue(1);
 	// then load 1 into the same reg iff the predicate to store is 1
-        SDOperand Tmp = N->getOperand(1);
+        SDOperand Tmp = ST->getValue();
         AddToISelQueue(Tmp);
         Tmp = SDOperand(CurDAG->getTargetNode(IA64::TPCADDS, MVT::i64, Initial,
                                               CurDAG->getConstant(1, MVT::i64),
@@ -520,8 +520,8 @@ SDNode *IA64DAGToDAGISel::Select(SDOperand Op) {
       case MVT::i64: Opc = IA64::ST8;  break;
       case MVT::f64: Opc = IA64::STF8; break;
       }
-    } else { //ISD::TRUNCSTORE
-      switch(cast<VTSDNode>(N->getOperand(4))->getVT()) {
+    } else { // Truncating store
+      switch(ST->getStoredVT()) {
       default: assert(0 && "unknown type in truncstore");
       case MVT::i8:  Opc = IA64::ST1;  break;
       case MVT::i16: Opc = IA64::ST2;  break;
diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp
index 450a47b..83894ee 100644
--- a/lib/Target/IA64/IA64ISelLowering.cpp
+++ b/lib/Target/IA64/IA64ISelLowering.cpp
@@ -331,7 +331,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
   
   Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy()));
 
-  SDOperand StackPtr, NullSV;
+  SDOperand StackPtr;
   std::vector<SDOperand> Stores;
   std::vector<SDOperand> Converts;
   std::vector<SDOperand> RegValuesToPass;
@@ -383,11 +383,10 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
       if(ValToStore.Val) {
         if(!StackPtr.Val) {
           StackPtr = DAG.getRegister(IA64::r12, MVT::i64);
-          NullSV = DAG.getSrcValue(NULL);
         }
         SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
         PtrOff = DAG.getNode(ISD::ADD, MVT::i64, StackPtr, PtrOff);
-        Stores.push_back(DAG.getStore(Chain, ValToStore, PtrOff, NullSV));
+        Stores.push_back(DAG.getStore(Chain, ValToStore, PtrOff, NULL, 0));
         ArgOffset += ObjSize;
       }
 
@@ -592,7 +591,7 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
                                                    VT));
     // Store the incremented VAList to the legalized pointer
     VAIncr = DAG.getStore(VAList.getValue(1), VAIncr,
-                          Op.getOperand(1), Op.getOperand(2));
+                          Op.getOperand(1), SV->getValue(), SV->getOffset());
     // Load the actual argument out of the pointer VAList
     return DAG.getLoad(Op.getValueType(), VAIncr, VAList, NULL, 0);
   }
@@ -600,8 +599,9 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
     // vastart just stores the address of the VarArgsFrameIndex slot into the
     // memory location argument.
     SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i64);
+    SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2));
     return DAG.getStore(Op.getOperand(0), FR, 
-                        Op.getOperand(1), Op.getOperand(2));
+                        Op.getOperand(1), SV->getValue(), SV->getOffset());
   }
   }
 }