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authorAnton Korobeynikov <asl@math.spbu.ru>2010-01-15 01:29:49 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2010-01-15 01:29:49 +0000
commitf7ed979257726fe1566c243a3174da76a18c4f19 (patch)
tree02a2231ffd775fcacc7bd0f38c2b6dbc277e8575 /lib/Target/MSP430
parentc9b16cc10887d270aa2a43a5a8c78e0ed3177dea (diff)
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Fix cmp emission on msp430: we definitely should turn stuff like
"icmp lhs, rhs" into "cmp rhs, lhs". This should fix PR5979. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93496 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/MSP430')
-rw-r--r--lib/Target/MSP430/MSP430ISelLowering.cpp12
-rw-r--r--lib/Target/MSP430/MSP430InstrInfo.td40
2 files changed, 27 insertions, 25 deletions
diff --git a/lib/Target/MSP430/MSP430ISelLowering.cpp b/lib/Target/MSP430/MSP430ISelLowering.cpp
index eedc568..d3dce4b 100644
--- a/lib/Target/MSP430/MSP430ISelLowering.cpp
+++ b/lib/Target/MSP430/MSP430ISelLowering.cpp
@@ -660,16 +660,16 @@ static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, SDValue &TargetCC,
default: llvm_unreachable("Invalid integer condition!");
case ISD::SETEQ:
TCC = MSP430CC::COND_E; // aka COND_Z
- // Minor optimization: if RHS is a constant, swap operands, then the
+ // Minor optimization: if LHS is a constant, swap operands, then the
// constant can be folded into comparison.
- if (RHS.getOpcode() == ISD::Constant)
+ if (LHS.getOpcode() == ISD::Constant)
std::swap(LHS, RHS);
break;
case ISD::SETNE:
TCC = MSP430CC::COND_NE; // aka COND_NZ
- // Minor optimization: if RHS is a constant, swap operands, then the
+ // Minor optimization: if LHS is a constant, swap operands, then the
// constant can be folded into comparison.
- if (RHS.getOpcode() == ISD::Constant)
+ if (LHS.getOpcode() == ISD::Constant)
std::swap(LHS, RHS);
break;
case ISD::SETULE:
@@ -1014,8 +1014,8 @@ MSP430TargetLowering::EmitShiftInstr(MachineInstr *MI,
// BB:
// cmp 0, N
// je RemBB
- BuildMI(BB, dl, TII.get(MSP430::CMP8ir))
- .addImm(0).addReg(ShiftAmtSrcReg);
+ BuildMI(BB, dl, TII.get(MSP430::CMP8ri))
+ .addReg(ShiftAmtSrcReg).addImm(0);
BuildMI(BB, dl, TII.get(MSP430::JCC))
.addMBB(RemBB)
.addImm(MSP430CC::COND_E);
diff --git a/lib/Target/MSP430/MSP430InstrInfo.td b/lib/Target/MSP430/MSP430InstrInfo.td
index d67ba90..022d171 100644
--- a/lib/Target/MSP430/MSP430InstrInfo.td
+++ b/lib/Target/MSP430/MSP430InstrInfo.td
@@ -819,38 +819,40 @@ def SWPB16r : Pseudo<(outs GR16:$dst), (ins GR16:$src),
// Integer comparisons
let Defs = [SRW] in {
def CMP8rr : Pseudo<(outs), (ins GR8:$src1, GR8:$src2),
- "cmp.b\t{$src1, $src2}",
+ "cmp.b\t{$src2, $src1}",
[(MSP430cmp GR8:$src1, GR8:$src2), (implicit SRW)]>;
def CMP16rr : Pseudo<(outs), (ins GR16:$src1, GR16:$src2),
- "cmp.w\t{$src1, $src2}",
+ "cmp.w\t{$src2, $src1}",
[(MSP430cmp GR16:$src1, GR16:$src2), (implicit SRW)]>;
-def CMP8ir : Pseudo<(outs), (ins i8imm:$src1, GR8:$src2),
- "cmp.b\t{$src1, $src2}",
- [(MSP430cmp imm:$src1, GR8:$src2), (implicit SRW)]>;
-def CMP16ir : Pseudo<(outs), (ins i16imm:$src1, GR16:$src2),
- "cmp.w\t{$src1, $src2}",
- [(MSP430cmp imm:$src1, GR16:$src2), (implicit SRW)]>;
-
-def CMP8im : Pseudo<(outs), (ins i8imm:$src1, memsrc:$src2),
- "cmp.b\t{$src1, $src2}",
- [(MSP430cmp (i8 imm:$src1), (load addr:$src2)), (implicit SRW)]>;
-def CMP16im : Pseudo<(outs), (ins i16imm:$src1, memsrc:$src2),
- "cmp.w\t{$src1, $src2}",
- [(MSP430cmp (i16 imm:$src1), (load addr:$src2)), (implicit SRW)]>;
+def CMP8ri : Pseudo<(outs), (ins GR8:$src1, i8imm:$src2),
+ "cmp.b\t{$src2, $src1}",
+ [(MSP430cmp GR8:$src1, imm:$src2), (implicit SRW)]>;
+def CMP16ri : Pseudo<(outs), (ins GR16:$src1, i16imm:$src2),
+ "cmp.w\t{$src2, $src1}",
+ [(MSP430cmp GR16:$src1, imm:$src2), (implicit SRW)]>;
+
+def CMP8mi : Pseudo<(outs), (ins memsrc:$src1, i8imm:$src2),
+ "cmp.b\t{$src2, $src1}",
+ [(MSP430cmp (load addr:$src1),
+ (i8 imm:$src2)), (implicit SRW)]>;
+def CMP16mi : Pseudo<(outs), (ins memsrc:$src1, i16imm:$src2),
+ "cmp.w\t{$src2, $src1}",
+ [(MSP430cmp (load addr:$src1),
+ (i16 imm:$src2)), (implicit SRW)]>;
def CMP8rm : Pseudo<(outs), (ins GR8:$src1, memsrc:$src2),
- "cmp.b\t{$src1, $src2}",
+ "cmp.b\t{$src2, $src1}",
[(MSP430cmp GR8:$src1, (load addr:$src2)), (implicit SRW)]>;
def CMP16rm : Pseudo<(outs), (ins GR16:$src1, memsrc:$src2),
- "cmp.w\t{$src1, $src2}",
+ "cmp.w\t{$src2, $src1}",
[(MSP430cmp GR16:$src1, (load addr:$src2)), (implicit SRW)]>;
def CMP8mr : Pseudo<(outs), (ins memsrc:$src1, GR8:$src2),
- "cmp.b\t{$src1, $src2}",
+ "cmp.b\t{$src2, $src1}",
[(MSP430cmp (load addr:$src1), GR8:$src2), (implicit SRW)]>;
def CMP16mr : Pseudo<(outs), (ins memsrc:$src1, GR16:$src2),
- "cmp.w\t{$src1, $src2}",
+ "cmp.w\t{$src2, $src1}",
[(MSP430cmp (load addr:$src1), GR16:$src2), (implicit SRW)]>;