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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-08-06 23:08:28 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-08-06 23:08:28 +0000 |
| commit | 3492eefa4b2509c87598678a6977074a3f6a50e6 (patch) | |
| tree | 6e479880fecb17ad357750d49759395f7cf2dd0a /lib/Target/Mips/Disassembler/MipsDisassembler.cpp | |
| parent | 3406d882c02a6cd1e16f4636351c23dcb68d785f (diff) | |
| download | external_llvm-3492eefa4b2509c87598678a6977074a3f6a50e6.zip external_llvm-3492eefa4b2509c87598678a6977074a3f6a50e6.tar.gz external_llvm-3492eefa4b2509c87598678a6977074a3f6a50e6.tar.bz2 | |
R600/SI: Use VSrc_* register classes as the default classes for types
Since the VSrc_* register classes contain both VGPRs and SGPRs, copies
that used be emitted by isel like this:
SGPR = COPY VGPR
Will now be emitted like this:
VSrC = COPY VGPR
This patch also adds a pass that tries to identify and fix situations where
a VGPR to SGPR copy may occur. Hopefully, these changes will make it
impossible for the compiler to generate illegal VGPR to SGPR copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187831 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Disassembler/MipsDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions