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authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-10-18 17:50:36 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-10-18 17:50:36 +0000
commitc3f16b316a7a15ee3bd32b4eb5753595cdce2757 (patch)
tree3009a165b69f1a2153bac52d79078f9afc831fcd /lib/Target/Mips/Makefile
parentde1ff7f5520989bf20ef391c9eb4aa320d865fbd (diff)
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Final patch that completes old JIT support for Mips:
-Fix binary codes and rename operands in .td files so that automatically generated function MipsCodeEmitter::getBinaryCodeForInstr gives correct encoding for instructions. -Define new class FMem for instructions that access memory. -Define new class FFRGPR for instructions that move data between GPR and FPU general and control registers. -Define custom encoder methods for memory operands, and also for size operands of ext and ins instructions. -Only static relocation model is currently implemented. Patch by Sasa Stankovic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142378 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Makefile')
-rw-r--r--lib/Target/Mips/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/Makefile b/lib/Target/Mips/Makefile
index cc4a8ae..d72693c 100644
--- a/lib/Target/Mips/Makefile
+++ b/lib/Target/Mips/Makefile
@@ -13,7 +13,7 @@ TARGET = Mips
# Make sure that tblgen is run, first thing.
BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \
- MipsGenAsmWriter.inc \
+ MipsGenAsmWriter.inc MipsGenCodeEmitter.inc \
MipsGenDAGISel.inc MipsGenCallingConv.inc \
MipsGenSubtargetInfo.inc