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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2007-11-06 03:15:20 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2007-11-06 03:15:20 +0000 |
| commit | 000604afd45e9f729cf6559cd5b4d33af0cddb02 (patch) | |
| tree | 8bea64304d714ea76bece8508c62d9dc0fad8b74 /lib/Target/Mips/Mips.td | |
| parent | efcc3f5c5e12c4558dbde25fba0986f511686d42 (diff) | |
| download | external_llvm-000604afd45e9f729cf6559cd5b4d33af0cddb02.zip external_llvm-000604afd45e9f729cf6559cd5b4d33af0cddb02.tar.gz external_llvm-000604afd45e9f729cf6559cd5b4d33af0cddb02.tar.bz2 | |
Better processor definition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43749 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips.td')
| -rw-r--r-- | lib/Target/Mips/Mips.td | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/Target/Mips/Mips.td b/lib/Target/Mips/Mips.td index 8beb3fb..c4b40e2 100644 --- a/lib/Target/Mips/Mips.td +++ b/lib/Target/Mips/Mips.td @@ -33,6 +33,7 @@ def MipsInstrInfo : InstrInfo { // CPU Directives // //===----------------------------------------------------------------------===// +// Not currently supported, but work as SubtargetFeature placeholder. def FeatureMipsIII : SubtargetFeature<"mips3", "IsMipsIII", "true", "MipsIII ISA Support">; @@ -40,8 +41,9 @@ def FeatureMipsIII : SubtargetFeature<"mips3", "IsMipsIII", "true", // Mips processors supported. //===----------------------------------------------------------------------===// -def : Processor<"generic", MipsGenericItineraries, []>; -//def : Processor<"r4000", MipsR4000Itineraries, [FeatureMipsIII]>; +def : Processor<"mips1", MipsGenericItineraries, []>; +def : Processor<"r2000", MipsGenericItineraries, []>; +def : Processor<"r3000", MipsGenericItineraries, []>; def Mips : Target { let InstructionSet = MipsInstrInfo; |