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author | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-20 23:47:44 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-20 23:47:44 +0000 |
commit | 4d2b0f3ce79cafca3b9aafd420da10a25e444f0d (patch) | |
tree | f829168aab7b2dcdd5271e3c6f54c3037795f457 /lib/Target/Mips/Mips.td | |
parent | e1bcd6b5c67968910d0262cd9bebd39db6887357 (diff) | |
download | external_llvm-4d2b0f3ce79cafca3b9aafd420da10a25e444f0d.zip external_llvm-4d2b0f3ce79cafca3b9aafd420da10a25e444f0d.tar.gz external_llvm-4d2b0f3ce79cafca3b9aafd420da10a25e444f0d.tar.bz2 |
Add definition of WSBH (Word Swap Bytes within Halfwords), which is an
instruction supported by mips32r2, and add a pattern which replaces bswap with
a ROTR and WSBH pair.
WSBW is removed since it is not an instruction the current architectures
support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147015 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips.td')
-rw-r--r-- | lib/Target/Mips/Mips.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/Mips.td b/lib/Target/Mips/Mips.td index e9e0f60..ff1c434 100644 --- a/lib/Target/Mips/Mips.td +++ b/lib/Target/Mips/Mips.td @@ -63,7 +63,7 @@ def FeatureMips32 : SubtargetFeature<"mips32", "MipsArchVersion", "Mips32", [FeatureCondMov, FeatureBitCount]>; def FeatureMips32r2 : SubtargetFeature<"mips32r2", "MipsArchVersion", "Mips32r2", "Mips32r2 ISA Support", - [FeatureMips32, FeatureSEInReg]>; + [FeatureMips32, FeatureSEInReg, FeatureSwap]>; def FeatureMips64 : SubtargetFeature<"mips64", "MipsArchVersion", "Mips64", "Mips64 ISA Support", [FeatureGP64Bit, FeatureFP64Bit, |