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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2007-08-18 02:18:07 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2007-08-18 02:18:07 +0000 |
| commit | 6d32ca076283b50e93e00a98e4473767f1a31e5a (patch) | |
| tree | 819ca35dd5634f49b77408ba78b702625fea3883 /lib/Target/Mips/Mips.td | |
| parent | 7ff6fa25037d207e31f65bedc8616a90f61abc25 (diff) | |
| download | external_llvm-6d32ca076283b50e93e00a98e4473767f1a31e5a.zip external_llvm-6d32ca076283b50e93e00a98e4473767f1a31e5a.tar.gz external_llvm-6d32ca076283b50e93e00a98e4473767f1a31e5a.tar.bz2 | |
support for Schedule included on Mips.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41159 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips.td')
| -rw-r--r-- | lib/Target/Mips/Mips.td | 40 |
1 files changed, 13 insertions, 27 deletions
diff --git a/lib/Target/Mips/Mips.td b/lib/Target/Mips/Mips.td index 662bc3b..8beb3fb 100644 --- a/lib/Target/Mips/Mips.td +++ b/lib/Target/Mips/Mips.td @@ -6,58 +6,44 @@ // University of Illinois Open Source License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// +// This is the top level entry point for the Mips target. +//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// -// Target-independent interfaces which we are implementing +// Target-independent interfaces //===----------------------------------------------------------------------===// include "../Target.td" //===----------------------------------------------------------------------===// -// Register File Description +// Descriptions //===----------------------------------------------------------------------===// include "MipsRegisterInfo.td" - -//===----------------------------------------------------------------------===// -// Subtarget features -//===----------------------------------------------------------------------===// - -// TODO: dummy, needed to compile -def FeatureCIX : SubtargetFeature<"r3000", "isR3000", "true", - "Enable r3000 extentions">; - -//===----------------------------------------------------------------------===// -// Instruction Description -//===----------------------------------------------------------------------===// - +include "MipsSchedule.td" include "MipsInstrInfo.td" +include "MipsCallingConv.td" def MipsInstrInfo : InstrInfo { - // Define how we want to layout our target-specific information field. let TSFlagsFields = []; let TSFlagsShifts = []; } + //===----------------------------------------------------------------------===// -// Calling Conventions +// CPU Directives // //===----------------------------------------------------------------------===// -include "MipsCallingConv.td" +def FeatureMipsIII : SubtargetFeature<"mips3", "IsMipsIII", "true", + "MipsIII ISA Support">; //===----------------------------------------------------------------------===// // Mips processors supported. //===----------------------------------------------------------------------===// -class Proc<string Name, list<SubtargetFeature> Features> - : Processor<Name, NoItineraries, Features>; - -def : Proc<"generic", []>; - -//===----------------------------------------------------------------------===// -// Declare the target which we are implementing -//===----------------------------------------------------------------------===// +def : Processor<"generic", MipsGenericItineraries, []>; +//def : Processor<"r4000", MipsR4000Itineraries, [FeatureMipsIII]>; def Mips : Target { - // Pull in Instruction Info: let InstructionSet = MipsInstrInfo; } + |