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authorAkira Hatanaka <ahatanak@gmail.com>2011-09-09 01:13:27 +0000
committerAkira Hatanaka <ahatanak@gmail.com>2011-09-09 01:13:27 +0000
commitad5f0c9e736ac081089f98fafce974dfe0c584de (patch)
treea340ebe7aff67afdc294e3614e89ed6dd5151cf5 /lib/Target/Mips/Mips.td
parentd40b0b0a0632d4b20631ac2196e0a07abb704343 (diff)
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Change default target architecture from Mips1 to Mips32r1 in preparation for
removing support for Mips1 and Mips2. This change and the ones that follow have been discussed with and approved by Bruno. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139344 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips.td')
-rw-r--r--lib/Target/Mips/Mips.td1
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/Mips/Mips.td b/lib/Target/Mips/Mips.td
index 433cd57..4087c82 100644
--- a/lib/Target/Mips/Mips.td
+++ b/lib/Target/Mips/Mips.td
@@ -79,6 +79,7 @@ def : Proc<"r3000", [FeatureMips1]>;
def : Proc<"mips2", [FeatureMips2]>;
def : Proc<"r6000", [FeatureMips2]>;
+def : Proc<"mips32r1", [FeatureMips32]>;
def : Proc<"4ke", [FeatureMips32r2]>;
// Allegrex is a 32bit subset of r4000, both for integer and fp registers,