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author | Akira Hatanaka <ahatanaka@mips.com> | 2012-12-21 22:35:47 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-12-21 22:35:47 +0000 |
commit | 2a732ec272e3bab004a47abb452ad47bc4eb8c7b (patch) | |
tree | ccb7667b6671a146d9f439e0d6e6e3a77399b2aa /lib/Target/Mips/Mips64InstrInfo.td | |
parent | a8215f4ec21188f3a793672202f20dbb93c8e5e8 (diff) | |
download | external_llvm-2a732ec272e3bab004a47abb452ad47bc4eb8c7b.zip external_llvm-2a732ec272e3bab004a47abb452ad47bc4eb8c7b.tar.gz external_llvm-2a732ec272e3bab004a47abb452ad47bc4eb8c7b.tar.bz2 |
[mips] Refactor logical NOR instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170937 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips64InstrInfo.td')
-rw-r--r-- | lib/Target/Mips/Mips64InstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td index 39d147f..d25087d 100644 --- a/lib/Target/Mips/Mips64InstrInfo.td +++ b/lib/Target/Mips/Mips64InstrInfo.td @@ -105,7 +105,7 @@ def SLTu64 : SetCC_R<"sltu", setult, CPU64Regs>, ADD_FM<0, 0x2b>; def AND64 : ArithLogicR<"and", CPU64Regs, 1, IIAlu, and>, ADD_FM<0, 0x24>; def OR64 : ArithLogicR<"or", CPU64Regs, 1, IIAlu, or>, ADD_FM<0, 0x25>; def XOR64 : ArithLogicR<"xor", CPU64Regs, 1, IIAlu, xor>, ADD_FM<0, 0x26>; -def NOR64 : LogicNOR<0x00, 0x27, "nor", CPU64Regs>; +def NOR64 : LogicNOR<"nor", CPU64Regs>, ADD_FM<0, 0x27>; /// Shift Instructions def DSLL : shift_rotate_imm64<"dsll", shl>, SRA_FM<0x38, 0>; |