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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-02 00:04:19 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-02 00:04:19 +0000 |
| commit | 4d70ceed33d07d88de837a80899c99ddf9c3534f (patch) | |
| tree | 69c58131ca510a774ed0d872684b690608bc2107 /lib/Target/Mips/Mips64InstrInfo.td | |
| parent | 1cd0ec007a4bdce4acf2ba99fe9231fd0859ea80 (diff) | |
| download | external_llvm-4d70ceed33d07d88de837a80899c99ddf9c3534f.zip external_llvm-4d70ceed33d07d88de837a80899c99ddf9c3534f.tar.gz external_llvm-4d70ceed33d07d88de837a80899c99ddf9c3534f.tar.bz2 | |
Add definitions of 32/64-bit unaligned load/store instructions for Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157865 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips64InstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/Mips64InstrInfo.td | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td index 53a5b37..7e129b8 100644 --- a/lib/Target/Mips/Mips64InstrInfo.td +++ b/lib/Target/Mips/Mips64InstrInfo.td @@ -141,6 +141,18 @@ defm USW64 : StoreM64<0x2b, "usw", truncstorei32_u, 1>; defm ULD : LoadM64<0x37, "uld", load_u, 1>; defm USD : StoreM64<0x3f, "usd", store_u, 1>; +/// load/store left/right +let isCodeGenOnly = 1 in { + defm LWL64 : LoadLeftRightM64<0x22, "lwl", MipsLWL>; + defm LWR64 : LoadLeftRightM64<0x26, "lwr", MipsLWR>; + defm SWL64 : StoreLeftRightM64<0x2a, "swl", MipsSWL>; + defm SWR64 : StoreLeftRightM64<0x2e, "swr", MipsSWR>; +} +defm LDL : LoadLeftRightM64<0x1a, "ldl", MipsLDL>; +defm LDR : LoadLeftRightM64<0x1b, "ldr", MipsLDR>; +defm SDL : StoreLeftRightM64<0x2c, "sdl", MipsSDL>; +defm SDR : StoreLeftRightM64<0x2d, "sdr", MipsSDR>; + /// Load-linked, Store-conditional def LLD : LLBase<0x34, "lld", CPU64Regs, mem>, Requires<[NotN64, HasStandardEncoding]>; |