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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-12-20 04:10:13 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-12-20 04:10:13 +0000 |
| commit | c4889013553a4e407e110d1f76d9b6cf1396e702 (patch) | |
| tree | 0356f9314f85b46e90602e18ff6a73335a4c227f /lib/Target/Mips/Mips64InstrInfo.td | |
| parent | cef95f702a5586781e5f812078a5c57f6f0e962b (diff) | |
| download | external_llvm-c4889013553a4e407e110d1f76d9b6cf1396e702.zip external_llvm-c4889013553a4e407e110d1f76d9b6cf1396e702.tar.gz external_llvm-c4889013553a4e407e110d1f76d9b6cf1396e702.tar.bz2 | |
[mips] Refactor conditional branch instructions with two register operands.
Separate encoding information from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170657 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips64InstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/Mips64InstrInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td index 9b548a7..7072a1d 100644 --- a/lib/Target/Mips/Mips64InstrInfo.td +++ b/lib/Target/Mips/Mips64InstrInfo.td @@ -166,8 +166,8 @@ def SCD_P8 : SCBase<0x3c, "scd", CPU64Regs, mem64>, /// Jump and Branch Instructions def JR64 : IndirectBranch<CPU64Regs>; -def BEQ64 : CBranch<0x04, "beq", seteq, CPU64Regs>; -def BNE64 : CBranch<0x05, "bne", setne, CPU64Regs>; +def BEQ64 : CBranch<"beq", seteq, CPU64Regs>, BEQ_FM<4>; +def BNE64 : CBranch<"bne", setne, CPU64Regs>, BEQ_FM<5>; def BGEZ64 : CBranchZero<0x01, 1, "bgez", setge, CPU64Regs>; def BGTZ64 : CBranchZero<0x07, 0, "bgtz", setgt, CPU64Regs>; def BLEZ64 : CBranchZero<0x06, 0, "blez", setle, CPU64Regs>; |