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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-07-31 18:16:49 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-07-31 18:16:49 +0000 |
| commit | 36bcc11236af961ff94820bf9817ecb4f98ace7e (patch) | |
| tree | 3db676bf499fda12e01d320b70e50024227753a4 /lib/Target/Mips/MipsISelLowering.cpp | |
| parent | 53b59d1d974184657edfd22779e0bb3653d164ec (diff) | |
| download | external_llvm-36bcc11236af961ff94820bf9817ecb4f98ace7e.zip external_llvm-36bcc11236af961ff94820bf9817ecb4f98ace7e.tar.gz external_llvm-36bcc11236af961ff94820bf9817ecb4f98ace7e.tar.bz2 | |
Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as
single-precision load and store.
Also avoid selecting LUXC1 and SUXC1 instructions during isel. It is incorrect
to map unaligned floating point load/store nodes to these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161063 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsISelLowering.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index b0acb23..da1bee0 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -314,8 +314,6 @@ bool MipsTargetLowering::allowsUnalignedMemoryAccesses(EVT VT) const { case MVT::i64: case MVT::i32: return true; - case MVT::f32: - return Subtarget->hasMips32r2Or64(); default: return false; } |