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authorPirama Arumuga Nainar <pirama@google.com>2015-05-20 12:55:36 -0700
committerPirama Arumuga Nainar <pirama@google.com>2015-05-26 14:28:33 -0700
commit560a17f4e3f8019a108abb7848a4735c59a43be0 (patch)
tree89b942fa3484ef229429f490a5e8219e741af0d1 /lib/Target/Mips/MipsISelLowering.cpp
parent2c3e0051c31c3f5b2328b447eadf1cf9c4427442 (diff)
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Update aosp/master LLVM with patches for fp16
Cherry-pick LLVM revisions r235191, r235215, r235220, r235341, r235363, r235530, r235609, r235610, r237004 r235191 has a required bug-fix and the rest are all related to fp16. Change-Id: I7fe8da5ffd8f2c06150885a54769abd18c3a04c6 (cherry picked from commit a18e6af1712fd41c4a705a19ad71f6e9ac7a4e68)
Diffstat (limited to 'lib/Target/Mips/MipsISelLowering.cpp')
-rw-r--r--lib/Target/Mips/MipsISelLowering.cpp24
1 files changed, 22 insertions, 2 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index f37737d..c78b79f 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -221,9 +221,23 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
}
- // MIPS doesn't have extending float->double load/store
- for (MVT VT : MVT::fp_valuetypes())
+ // MIPS doesn't have extending float->double load/store. Set LoadExtAction
+ // for f32, f16
+ for (MVT VT : MVT::fp_valuetypes()) {
setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand);
+ setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand);
+ }
+
+ // Set LoadExtAction for f16 vectors to Expand
+ for (MVT VT : MVT::fp_vector_valuetypes()) {
+ MVT F16VT = MVT::getVectorVT(MVT::f16, VT.getVectorNumElements());
+ if (F16VT.isValid())
+ setLoadExtAction(ISD::EXTLOAD, VT, F16VT, Expand);
+ }
+
+ setTruncStoreAction(MVT::f32, MVT::f16, Expand);
+ setTruncStoreAction(MVT::f64, MVT::f16, Expand);
+
setTruncStoreAction(MVT::f64, MVT::f32, Expand);
// Used by legalize types to correctly generate the setcc result.
@@ -339,6 +353,12 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
setOperationAction(ISD::FREM, MVT::f32, Expand);
setOperationAction(ISD::FREM, MVT::f64, Expand);
+ // Lower f16 conversion operations into library calls
+ setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand);
+ setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand);
+ setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand);
+ setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand);
+
setOperationAction(ISD::EH_RETURN, MVT::Other, Custom);
setOperationAction(ISD::VASTART, MVT::Other, Custom);