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| author | Akira Hatanaka <ahatanak@gmail.com> | 2011-08-12 21:30:06 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanak@gmail.com> | 2011-08-12 21:30:06 +0000 |
| commit | 5c21c9e78ebbb5b766fac31bf30433926dcc2a5d (patch) | |
| tree | d8550ce4ac592525bd51b8cd353fa2e6ac738591 /lib/Target/Mips/MipsISelLowering.cpp | |
| parent | 4dfe220ad55e0f1e5edbf7cdd07f88497ddfdf25 (diff) | |
| download | external_llvm-5c21c9e78ebbb5b766fac31bf30433926dcc2a5d.zip external_llvm-5c21c9e78ebbb5b766fac31bf30433926dcc2a5d.tar.gz external_llvm-5c21c9e78ebbb5b766fac31bf30433926dcc2a5d.tar.bz2 | |
Define unaligned load and store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137515 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsISelLowering.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 54fa2d4..28ab854 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -195,6 +195,11 @@ MipsTargetLowering(MipsTargetMachine &TM) setExceptionSelectorRegister(Mips::A1); } +bool MipsTargetLowering::allowsUnalignedMemoryAccesses(EVT VT) const { + // FIXME: allow unaligned memory accesses for other types too. + return VT.getSimpleVT().SimpleTy == MVT::i32; +} + MVT::SimpleValueType MipsTargetLowering::getSetCCResultType(EVT VT) const { return MVT::i32; } @@ -1685,6 +1690,7 @@ WriteByValArg(SDValue& Chain, DebugLoc dl, unsigned NumWords = (Flags.getByValSize() + 3) / 4; unsigned LastWord = FirstWord + NumWords; unsigned CurWord; + unsigned ByValAlign = Flags.getByValAlign(); // copy the first 4 words of byval arg to registers A0 - A3 for (CurWord = FirstWord; CurWord < std::min(LastWord, O32IntRegsSize); @@ -1694,7 +1700,8 @@ WriteByValArg(SDValue& Chain, DebugLoc dl, MVT::i32)); SDValue LoadVal = DAG.getLoad(MVT::i32, dl, Chain, LoadPtr, MachinePointerInfo(), - false, false, 0); + false, false, std::min(ByValAlign, + (unsigned )4)); MemOpChains.push_back(LoadVal.getValue(1)); unsigned DstReg = O32IntRegs[CurWord]; RegsToPass.push_back(std::make_pair(DstReg, LoadVal)); @@ -1710,7 +1717,7 @@ WriteByValArg(SDValue& Chain, DebugLoc dl, SDValue Dst = DAG.getFrameIndex(LastFI, PtrType); Chain = DAG.getMemcpy(Chain, dl, Dst, Src, DAG.getConstant(SizeInBytes, MVT::i32), - /*Align*/4, + /*Align*/ByValAlign, /*isVolatile=*/false, /*AlwaysInline=*/false, MachinePointerInfo(0), MachinePointerInfo(0)); MemOpChains.push_back(Chain); |