diff options
| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-08-14 00:47:08 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-08-14 00:47:08 +0000 |
| commit | cbaf6d0cc3d3f363f269346817a90d3cbc8d1084 (patch) | |
| tree | 7cb0cc8104dd8d5a263a8d5ac4f3089fe7614051 /lib/Target/Mips/MipsISelLowering.cpp | |
| parent | 7cd85b7492c5bad9d0e2666058beee54d05c9d61 (diff) | |
| download | external_llvm-cbaf6d0cc3d3f363f269346817a90d3cbc8d1084.zip external_llvm-cbaf6d0cc3d3f363f269346817a90d3cbc8d1084.tar.gz external_llvm-cbaf6d0cc3d3f363f269346817a90d3cbc8d1084.tar.bz2 | |
[mips] Rename HIRegs and LORegs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188341 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsISelLowering.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index a3bddf9..377236a 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -425,8 +425,8 @@ static SDValue performDivRemCombine(SDNode *N, SelectionDAG &DAG, return SDValue(); EVT Ty = N->getValueType(0); - unsigned LO = (Ty == MVT::i32) ? Mips::LO : Mips::LO64; - unsigned HI = (Ty == MVT::i32) ? Mips::HI : Mips::HI64; + unsigned LO = (Ty == MVT::i32) ? Mips::LO0 : Mips::LO0_64; + unsigned HI = (Ty == MVT::i32) ? Mips::HI0 : Mips::HI0_64; unsigned Opc = N->getOpcode() == ISD::SDIVREM ? MipsISD::DivRem16 : MipsISD::DivRemU16; SDLoc DL(N); @@ -2924,7 +2924,7 @@ parseRegForInlineAsmConstraint(const StringRef &C, MVT VT) const { return std::make_pair((unsigned)0, (const TargetRegisterClass*)0); RC = TRI->getRegClass(Prefix == "hi" ? - Mips::HIRegsRegClassID : Mips::LORegsRegClassID); + Mips::HI32RegClassID : Mips::LO32RegClassID); return std::make_pair(*(RC->begin()), RC); } @@ -2992,8 +2992,8 @@ getRegForInlineAsmConstraint(const std::string &Constraint, MVT VT) const return std::make_pair((unsigned)Mips::T9_64, &Mips::GPR64RegClass); case 'l': // register suitable for indirect jump if (VT == MVT::i32) - return std::make_pair((unsigned)Mips::LO, &Mips::LORegsRegClass); - return std::make_pair((unsigned)Mips::LO64, &Mips::LORegs64RegClass); + return std::make_pair((unsigned)Mips::LO0, &Mips::LO32RegClass); + return std::make_pair((unsigned)Mips::LO0_64, &Mips::LO64RegClass); case 'x': // register suitable for indirect jump // Fixme: Not triggering the use of both hi and low // This will generate an error message |