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authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2008-07-05 19:05:21 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2008-07-05 19:05:21 +0000
commit4fb1f546cc86b4a35d1e73b4ec1be06e30f70d4b (patch)
tree4e9448b1e96f4e7792d2dcb85781c53ddef8dd39 /lib/Target/Mips/MipsISelLowering.h
parentac496a17678473310a3c468a8ac5a5a30426876c (diff)
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Several changes to Mips backend, experimental fp support being the most
important. - Cleanup in the Subtarget info with addition of new features, not all support yet, but they allow the future inclusion of features easier. Among new features, we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit integer and float registers, allegrex vector FPU (VFPU), single float only support. - TargetMachine now detects allegrex core. - Added allegrex (Mips32r2) sext_inreg instructions. - *Added Float Point Instructions*, handling single float only, and aliased accesses for 32-bit FPUs. - Some cleanup in FP instruction formats and FP register classes. - Calling conventions improved to support mips 32-bit EABI. - Added Asm Printer support for fp cond codes. - Added support for sret copy to a return register. - EABI support added into LowerCALL and FORMAL_ARGS. - MipsFunctionInfo now keeps a virtual register per function to track the sret on function entry until function ret. - MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...), FP cond codes mapping and initial FP Branch Analysis. - Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond, FPCmp - MipsTargetLowering : handling different FP classes, Allegrex support, sret return copy, no homing location within EABI, non 32-bit stack objects arguments, and asm constraint for float. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53146 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsISelLowering.h')
-rw-r--r--lib/Target/Mips/MipsISelLowering.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.h b/lib/Target/Mips/MipsISelLowering.h
index 6f621b4..bd4b004 100644
--- a/lib/Target/Mips/MipsISelLowering.h
+++ b/lib/Target/Mips/MipsISelLowering.h
@@ -40,6 +40,12 @@ namespace llvm {
// Select CC Pseudo Instruction
SelectCC,
+ // Float Point Branch Conditional
+ FPBrcond,
+
+ // Float Point Compare
+ FPCmp,
+
// Return
Ret
};
@@ -69,6 +75,9 @@ namespace llvm {
MVT getSetCCResultType(const SDOperand &) const;
private:
+ // Subtarget Info
+ const MipsSubtarget *Subtarget;
+
// Lower Operand helpers
SDOperand LowerCCCArguments(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG, unsigned CC);