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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-12-20 04:20:09 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-12-20 04:20:09 +0000 |
| commit | 1e7739f6140da773b6e998525d7900fa82670f00 (patch) | |
| tree | 9f66500b4bbf2f9d480dc7c32b9442a0dc439eaa /lib/Target/Mips/MipsInstrFPU.td | |
| parent | 77e85f367c4f69fb95a88419aba1eef2cbab6800 (diff) | |
| download | external_llvm-1e7739f6140da773b6e998525d7900fa82670f00.zip external_llvm-1e7739f6140da773b6e998525d7900fa82670f00.tar.gz external_llvm-1e7739f6140da773b6e998525d7900fa82670f00.tar.bz2 | |
[mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass
parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170661 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsInstrFPU.td')
| -rw-r--r-- | lib/Target/Mips/MipsInstrFPU.td | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/lib/Target/Mips/MipsInstrFPU.td b/lib/Target/Mips/MipsInstrFPU.td index 3abc986..ab6f8ab 100644 --- a/lib/Target/Mips/MipsInstrFPU.td +++ b/lib/Target/Mips/MipsInstrFPU.td @@ -437,14 +437,13 @@ def FCMP_D64 : CEQS_FT<"d", FGR64, IIFcmp, MipsFPCmp>, CEQS_FM<17>, //===----------------------------------------------------------------------===// // Floating Point Pseudo-Instructions //===----------------------------------------------------------------------===// -def MOVCCRToCCR : PseudoSE<(outs CCR:$dst), (ins CCR:$src), - "# MOVCCRToCCR", []>; +def MOVCCRToCCR : PseudoSE<(outs CCR:$dst), (ins CCR:$src), []>; // This pseudo instr gets expanded into 2 mtc1 instrs after register // allocation. def BuildPairF64 : PseudoSE<(outs AFGR64:$dst), - (ins CPURegs:$lo, CPURegs:$hi), "", + (ins CPURegs:$lo, CPURegs:$hi), [(set AFGR64:$dst, (MipsBuildPairF64 CPURegs:$lo, CPURegs:$hi))]>; // This pseudo instr gets expanded into 2 mfc1 instrs after register @@ -452,7 +451,7 @@ def BuildPairF64 : // if n is 0, lower part of src is extracted. // if n is 1, higher part of src is extracted. def ExtractElementF64 : - PseudoSE<(outs CPURegs:$dst), (ins AFGR64:$src, i32imm:$n), "", + PseudoSE<(outs CPURegs:$dst), (ins AFGR64:$src, i32imm:$n), [(set CPURegs:$dst, (MipsExtractElementF64 AFGR64:$src, imm:$n))]>; //===----------------------------------------------------------------------===// |