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author | Akira Hatanaka <ahatanaka@mips.com> | 2012-12-13 01:34:09 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-12-13 01:34:09 +0000 |
commit | b573539c6b47d020ade2e41c0ff3afcd00f294f4 (patch) | |
tree | b509171241dabba5aac396a3adb958df0a399a27 /lib/Target/Mips/MipsInstrFPU.td | |
parent | 89828a6a563426edda0e30384997b2b24be6bb12 (diff) | |
download | external_llvm-b573539c6b47d020ade2e41c0ff3afcd00f294f4.zip external_llvm-b573539c6b47d020ade2e41c0ff3afcd00f294f4.tar.gz external_llvm-b573539c6b47d020ade2e41c0ff3afcd00f294f4.tar.bz2 |
[mips] Modify definitions of floating point comparison instructions.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170077 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsInstrFPU.td')
-rw-r--r-- | lib/Target/Mips/MipsInstrFPU.td | 23 |
1 files changed, 14 insertions, 9 deletions
diff --git a/lib/Target/Mips/MipsInstrFPU.td b/lib/Target/Mips/MipsInstrFPU.td index 878e6b2..8354a9d 100644 --- a/lib/Target/Mips/MipsInstrFPU.td +++ b/lib/Target/Mips/MipsInstrFPU.td @@ -284,6 +284,14 @@ class BC1F_FT<string opstr, InstrItinClass Itin, let Uses = [FCR31]; } +class CEQS_FT<string typestr, RegisterClass RC, InstrItinClass Itin, + SDPatternOperator OpNode = null_frag> : + InstSE<(outs), (ins RC:$fs, RC:$ft, condcode:$cond), + !strconcat("c.$cond.", typestr, "\t$fs, $ft"), + [(OpNode RC:$fs, RC:$ft, imm:$cond)], Itin, FrmFR> { + let Defs = [FCR31]; +} + //===----------------------------------------------------------------------===// // Floating Point Instructions //===----------------------------------------------------------------------===// @@ -537,15 +545,12 @@ class FCMP<bits<5> fmt, RegisterClass RC, string typestr> : [(MipsFPCmp RC:$fs, RC:$ft, imm:$cc)]>; /// Floating Point Compare -let Defs=[FCR31] in { - def FCMP_S32 : FCMP<0x10, FGR32, "s">; - def FCMP_D32 : FCMP<0x11, AFGR64, "d">, - Requires<[NotFP64bit, HasStdEnc]>; - def FCMP_D64 : FCMP<0x11, FGR64, "d">, - Requires<[IsFP64bit, HasStdEnc]> { - let DecoderNamespace = "Mips64"; - } -} +def FCMP_S32 : CEQS_FT<"s", FGR32, IIFcmp, MipsFPCmp>, CEQS_FM<16>; +def FCMP_D32 : CEQS_FT<"d", AFGR64, IIFcmp, MipsFPCmp>, CEQS_FM<17>, + Requires<[NotFP64bit, HasStdEnc]>; +let DecoderNamespace = "Mips64" in +def FCMP_D64 : CEQS_FT<"d", FGR64, IIFcmp, MipsFPCmp>, CEQS_FM<17>, + Requires<[IsFP64bit, HasStdEnc]>; //===----------------------------------------------------------------------===// // Floating Point Pseudo-Instructions |