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| author | Akira Hatanaka <ahatanaka@mips.com> | 2011-11-07 21:32:58 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-11-07 21:32:58 +0000 |
| commit | e7126ebd549d34a1c864db86ddfac1226994b6b0 (patch) | |
| tree | a8ce9f09a572104faf6606b164905f2f0d766d63 /lib/Target/Mips/MipsInstrFPU.td | |
| parent | d8f9f342307b1351a05c081cd5c7fe92678d3c1f (diff) | |
| download | external_llvm-e7126ebd549d34a1c864db86ddfac1226994b6b0.zip external_llvm-e7126ebd549d34a1c864db86ddfac1226994b6b0.tar.gz external_llvm-e7126ebd549d34a1c864db86ddfac1226994b6b0.tar.bz2 | |
Add definitions of 64-bit instructions which move data between integer and
floating pointer registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144016 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsInstrFPU.td')
| -rw-r--r-- | lib/Target/Mips/MipsInstrFPU.td | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsInstrFPU.td b/lib/Target/Mips/MipsInstrFPU.td index 62cee12..0778c3d 100644 --- a/lib/Target/Mips/MipsInstrFPU.td +++ b/lib/Target/Mips/MipsInstrFPU.td @@ -183,6 +183,14 @@ def MTC1 : FFRGPR<0x04, (outs FGR32:$fs), (ins CPURegs:$rt), "mtc1\t$rt, $fs", [(set FGR32:$fs, (bitconvert CPURegs:$rt))]>; +def DMFC1 : FFRGPR<0x01, (outs CPU64Regs:$rt), (ins FGR64:$fs), + "dmfc1\t$rt, $fs", + [(set CPU64Regs:$rt, (bitconvert FGR64:$fs))]>; + +def DMTC1 : FFRGPR<0x05, (outs FGR64:$fs), (ins CPU64Regs:$rt), + "dmtc1\t$rt, $fs", + [(set FGR64:$fs, (bitconvert CPU64Regs:$rt))]>; + def FMOV_S : FFR1<0x6, 16, "mov", "s", FGR32, FGR32>; def FMOV_D32 : FFR1<0x6, 17, "mov", "d", AFGR64, AFGR64>, Requires<[NotFP64bit]>; |