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author | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-23 00:21:05 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-23 00:21:05 +0000 |
commit | fc4eafa0f490bd06d8191a2f007514b9e3ce0387 (patch) | |
tree | 3ba47dec32b4f29ed8b80df2b2ddb55186892f38 /lib/Target/Mips/MipsInstrInfo.h | |
parent | 91a35f03da446009cd1de4cdabaa1cdec7e74e0c (diff) | |
download | external_llvm-fc4eafa0f490bd06d8191a2f007514b9e3ce0387.zip external_llvm-fc4eafa0f490bd06d8191a2f007514b9e3ce0387.tar.gz external_llvm-fc4eafa0f490bd06d8191a2f007514b9e3ce0387.tar.bz2 |
Make function loadImmediate a member of MipsSEInstrInfo and change it to return
the temporary register that was used to load the immediate. Currently, it always
returns register $at, but this will change if, in the future, we decide to use
another register.
No changes in functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162417 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsInstrInfo.h')
-rw-r--r-- | lib/Target/Mips/MipsInstrInfo.h | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.h b/lib/Target/Mips/MipsInstrInfo.h index 7d56259..aca2bc7 100644 --- a/lib/Target/Mips/MipsInstrInfo.h +++ b/lib/Target/Mips/MipsInstrInfo.h @@ -88,18 +88,6 @@ private: const SmallVectorImpl<MachineOperand>& Cond) const; }; -namespace Mips { - /// Emit a series of instructions to load an immediate. All instructions - /// except for the last one are emitted. The function returns the number of - /// MachineInstrs generated. The opcode-immediate pair of the last - /// instruction is returned in LastInst, if it is not 0. - unsigned - loadImmediate(int64_t Imm, bool IsN64, const TargetInstrInfo &TII, - MachineBasicBlock& MBB, MachineBasicBlock::iterator II, - DebugLoc DL, bool LastInstrIsADDiu, - MipsAnalyzeImmediate::Inst *LastInst); -} - /// Create MipsInstrInfo objects. const MipsInstrInfo *createMips16InstrInfo(MipsTargetMachine &TM); const MipsInstrInfo *createMipsSEInstrInfo(MipsTargetMachine &TM); |