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author | Matheus Almeida <matheus.almeida@imgtec.com> | 2013-10-21 12:26:50 +0000 |
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committer | Matheus Almeida <matheus.almeida@imgtec.com> | 2013-10-21 12:26:50 +0000 |
commit | 006cff8d7b60ddf632f8642f01693dace7827d8b (patch) | |
tree | 9789dabdb04ff17f902100ce5385d30a57334644 /lib/Target/Mips/MipsMSAInstrFormats.td | |
parent | cebd4010222f28bb68c217047fd0b2c90498f7ca (diff) | |
download | external_llvm-006cff8d7b60ddf632f8642f01693dace7827d8b.zip external_llvm-006cff8d7b60ddf632f8642f01693dace7827d8b.tar.gz external_llvm-006cff8d7b60ddf632f8642f01693dace7827d8b.tar.bz2 |
[mips][msa] Direct Object Emission support for CTCMSA and CFCMSA.
These instructions are logically related as they allow read/write of MSA control registers.
Currently MSA control registers are emitted by number but hopefully that will change as soon
as GAS starts accepting them by name as that would make the assembly easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193078 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsMSAInstrFormats.td')
-rw-r--r-- | lib/Target/Mips/MipsMSAInstrFormats.td | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsMSAInstrFormats.td b/lib/Target/Mips/MipsMSAInstrFormats.td index c9b3745..8fe4dbc 100644 --- a/lib/Target/Mips/MipsMSAInstrFormats.td +++ b/lib/Target/Mips/MipsMSAInstrFormats.td @@ -150,6 +150,26 @@ class MSA_ELM_FMT<bits<10> major, bits<6> minor>: MSAInst { let Inst{5-0} = minor; } +class MSA_ELM_CFCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst { + bits<5> rd; + bits<5> cs; + + let Inst{25-16} = major; + let Inst{15-11} = cs; + let Inst{10-6} = rd; + let Inst{5-0} = minor; +} + +class MSA_ELM_CTCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst { + bits<5> rs; + bits<5> cd; + + let Inst{25-16} = major; + let Inst{15-11} = rs; + let Inst{10-6} = cd; + let Inst{5-0} = minor; +} + class MSA_ELM_B_FMT<bits<4> major, bits<6> minor>: MSAInst { bits<4> n; bits<5> ws; |