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author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2008-07-05 19:05:21 +0000 |
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committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2008-07-05 19:05:21 +0000 |
commit | 225ca9cdd70de3d12641b0aba7daf6cb568a7ebd (patch) | |
tree | 4e9448b1e96f4e7792d2dcb85781c53ddef8dd39 /lib/Target/Mips/MipsMachineFunction.h | |
parent | 126d90770bdb17e6925b2fe26de99aa079b7b9b3 (diff) | |
download | external_llvm-225ca9cdd70de3d12641b0aba7daf6cb568a7ebd.zip external_llvm-225ca9cdd70de3d12641b0aba7daf6cb568a7ebd.tar.gz external_llvm-225ca9cdd70de3d12641b0aba7daf6cb568a7ebd.tar.bz2 |
Several changes to Mips backend, experimental fp support being the most
important.
- Cleanup in the Subtarget info with addition of new features, not all support
yet, but they allow the future inclusion of features easier. Among new features,
we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit
integer
and float registers, allegrex vector FPU (VFPU), single float only support.
- TargetMachine now detects allegrex core.
- Added allegrex (Mips32r2) sext_inreg instructions.
- *Added Float Point Instructions*, handling single float only, and
aliased accesses for 32-bit FPUs.
- Some cleanup in FP instruction formats and FP register classes.
- Calling conventions improved to support mips 32-bit EABI.
- Added Asm Printer support for fp cond codes.
- Added support for sret copy to a return register.
- EABI support added into LowerCALL and FORMAL_ARGS.
- MipsFunctionInfo now keeps a virtual register per function to track the
sret on function entry until function ret.
- MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...),
FP cond codes mapping and initial FP Branch Analysis.
- Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond,
FPCmp
- MipsTargetLowering : handling different FP classes, Allegrex support, sret
return copy, no homing location within EABI, non 32-bit stack objects
arguments, and asm constraint for float.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53146 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsMachineFunction.h')
-rw-r--r-- | lib/Target/Mips/MipsMachineFunction.h | 41 |
1 files changed, 23 insertions, 18 deletions
diff --git a/lib/Target/Mips/MipsMachineFunction.h b/lib/Target/Mips/MipsMachineFunction.h index e0ecdd9..4c53fcb 100644 --- a/lib/Target/Mips/MipsMachineFunction.h +++ b/lib/Target/Mips/MipsMachineFunction.h @@ -25,12 +25,12 @@ namespace llvm { class MipsFunctionInfo : public MachineFunctionInfo { private: - /// Holds for each function where on the stack - /// the Frame Pointer must be saved + /// Holds for each function where on the stack the Frame Pointer must be + /// saved. int FPStackOffset; - /// Holds for each function where on the stack - /// the Return Address must be saved + /// Holds for each function where on the stack the Return Address must be + /// saved. int RAStackOffset; /// MipsFIHolder - Holds a FrameIndex and it's Stack Pointer Offset @@ -43,31 +43,34 @@ private: : FI(FrameIndex), SPOffset(StackPointerOffset) {} }; - /// When PIC is used the GP must be saved on the stack - /// on the function prologue and must be reloaded from this - /// stack location after every call. A reference to its stack - /// location and frame index must be kept to be used on - /// emitPrologue and processFunctionBeforeFrameFinalized. + /// When PIC is used the GP must be saved on the stack on the function + /// prologue and must be reloaded from this stack location after every + /// call. A reference to its stack location and frame index must be kept + /// to be used on emitPrologue and processFunctionBeforeFrameFinalized. MipsFIHolder GPHolder; - // On LowerFORMAL_ARGUMENTS the stack size is unknown, - // so the Stack Pointer Offset calculation of "not in - // register arguments" must be postponed to emitPrologue. + // On LowerFORMAL_ARGUMENTS the stack size is unknown, so the Stack + // Pointer Offset calculation of "not in register arguments" must be + // postponed to emitPrologue. SmallVector<MipsFIHolder, 16> FnLoadArgs; bool HasLoadArgs; - // When VarArgs, we must write registers back to caller - // stack, preserving on register arguments. Since the - // stack size is unknown on LowerFORMAL_ARGUMENTS, - // the Stack Pointer Offset calculation must be + // When VarArgs, we must write registers back to caller stack, preserving + // on register arguments. Since the stack size is unknown on + // LowerFORMAL_ARGUMENTS, the Stack Pointer Offset calculation must be // postponed to emitPrologue. SmallVector<MipsFIHolder, 4> FnStoreVarArgs; bool HasStoreVarArgs; + /// SRetReturnReg - Some subtargets require that sret lowering includes + /// returning the value of the returned struct in a register. This field + /// holds the virtual register into which the sret argument is passed. + unsigned SRetReturnReg; + public: MipsFunctionInfo(MachineFunction& MF) - : FPStackOffset(0), RAStackOffset(0), GPHolder(-1,-1), - HasLoadArgs(false), HasStoreVarArgs(false) + : FPStackOffset(0), RAStackOffset(0), GPHolder(-1,-1), HasLoadArgs(false), + HasStoreVarArgs(false), SRetReturnReg(0) {} int getFPStackOffset() const { return FPStackOffset; } @@ -109,6 +112,8 @@ public: MFI->setObjectOffset( FnStoreVarArgs[i].FI, FnStoreVarArgs[i].SPOffset ); } + unsigned getSRetReturnReg() const { return SRetReturnReg; } + void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; } }; } // end of namespace llvm |