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author | Akira Hatanaka <ahatanak@gmail.com> | 2011-05-19 18:25:03 +0000 |
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committer | Akira Hatanaka <ahatanak@gmail.com> | 2011-05-19 18:25:03 +0000 |
commit | 59d266029c51faac156e1ceaabc6f1faf5f2b81b (patch) | |
tree | d37aee4707aa4dd3c3176d818564eea7bc90e28e /lib/Target/Mips/MipsRegisterInfo.td | |
parent | aaa7f499c1a2d46491a98d978ef45b0a06d73d31 (diff) | |
download | external_llvm-59d266029c51faac156e1ceaabc6f1faf5f2b81b.zip external_llvm-59d266029c51faac156e1ceaabc6f1faf5f2b81b.tar.gz external_llvm-59d266029c51faac156e1ceaabc6f1faf5f2b81b.tar.bz2 |
Increase number of available registers when target is MIPS32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131660 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsRegisterInfo.td')
-rw-r--r-- | lib/Target/Mips/MipsRegisterInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Mips/MipsRegisterInfo.td b/lib/Target/Mips/MipsRegisterInfo.td index 9f9cae7..341646b 100644 --- a/lib/Target/Mips/MipsRegisterInfo.td +++ b/lib/Target/Mips/MipsRegisterInfo.td @@ -214,7 +214,7 @@ def FGR32 : RegisterClass<"Mips", [f32], 32, const TargetMachine &TM = MF.getTarget(); const MipsSubtarget &Subtarget = TM.getSubtarget<MipsSubtarget>(); - if (Subtarget.isSingleFloat()) + if (Subtarget.isMips32() || Subtarget.isSingleFloat()) return MIPS_FGR32; else return MIPS_SVR4_FGR32; @@ -225,7 +225,7 @@ def FGR32 : RegisterClass<"Mips", [f32], 32, const TargetMachine &TM = MF.getTarget(); const MipsSubtarget &Subtarget = TM.getSubtarget<MipsSubtarget>(); - if (Subtarget.isSingleFloat()) + if (Subtarget.isMips32() || Subtarget.isSingleFloat()) return MIPS_FGR32 + (sizeof(MIPS_FGR32) / sizeof(unsigned)); else return MIPS_SVR4_FGR32 + (sizeof(MIPS_SVR4_FGR32) / sizeof(unsigned)); |