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author | Akira Hatanaka <ahatanaka@mips.com> | 2012-05-16 22:19:56 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-05-16 22:19:56 +0000 |
commit | 66e19c3e9db6e2727be21074a52f5c9fa187050f (patch) | |
tree | c69324d29909da842676fa2e4b2c502c6f446625 /lib/Target/Mips/MipsSubtarget.cpp | |
parent | bec5463937a4e0832188327e43cf00cb7e712e38 (diff) | |
download | external_llvm-66e19c3e9db6e2727be21074a52f5c9fa187050f.zip external_llvm-66e19c3e9db6e2727be21074a52f5c9fa187050f.tar.gz external_llvm-66e19c3e9db6e2727be21074a52f5c9fa187050f.tar.bz2 |
This patch adds the register class for MIPS16 as well as the ability for
llc to recognize MIPS16 as a MIPS ASE extension. -mips16 will mean the
mips16 ASE for mips32 by default.
As part of fixing of adding this we discovered some small changes that
need to be made to MipsInstrInfo::storeRegToStackSLot and
MipsInstrInfo::loadRegFromStackSlot. We were using some "==" equality tests
where in fact we should have been using Mips::<regclas>.hasSubClassEQ instead,
per suggestion of Jakob Stoklund Olesen.
Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156958 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsSubtarget.cpp')
-rw-r--r-- | lib/Target/Mips/MipsSubtarget.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp index 4452268..f072802 100644 --- a/lib/Target/Mips/MipsSubtarget.cpp +++ b/lib/Target/Mips/MipsSubtarget.cpp @@ -30,7 +30,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false), IsLinux(true), HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), - HasMinMax(false), HasSwap(false), HasBitCount(false) + HasMinMax(false), HasSwap(false), HasBitCount(false), InMips16Mode(false) { std::string CPUName = CPU; if (CPUName.empty()) |