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| author | Bill Wendling <isanbard@gmail.com> | 2007-11-13 00:44:25 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2007-11-13 00:44:25 +0000 |
| commit | 0f8d9c04d9feef86cee35cf5fecfb348a6b3de50 (patch) | |
| tree | ff1ec5ac7bcbe29e732b1a10fe515e14cfc39d44 /lib/Target/Mips | |
| parent | 3ba3a9b586b4590edb572ed05391fc737117ee27 (diff) | |
| download | external_llvm-0f8d9c04d9feef86cee35cf5fecfb348a6b3de50.zip external_llvm-0f8d9c04d9feef86cee35cf5fecfb348a6b3de50.tar.gz external_llvm-0f8d9c04d9feef86cee35cf5fecfb348a6b3de50.tar.bz2 | |
Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).
This can only result in tears...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44037 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 10 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 17 |
2 files changed, 14 insertions, 13 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index d12d30b..d0a5ed7 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -399,12 +399,10 @@ LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG, unsigned CC) } // Create the CALLSEQ_END node. - NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); - Ops.clear(); - Ops.push_back(Chain); - Ops.push_back(DAG.getConstant(NumBytes, getPointerTy())); - Ops.push_back(InFlag); - Chain = DAG.getNode(ISD::CALLSEQ_END, NodeTys, &Ops[0], Ops.size()); + Chain = DAG.getCALLSEQ_END(Chain, + DAG.getConstant(NumBytes, getPointerTy()), + DAG.getConstant(0, getPointerTy()), + InFlag); InFlag = Chain.getValue(1); // Handle result values, copying them out of physregs into vregs that we diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 3d7504b..1252912 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -34,11 +34,14 @@ def MipsRet : SDNode<"MipsISD::Ret", SDT_MipsRet, [SDNPHasChain, SDNPOptInFlag]>; // These are target-independent nodes, but have target-specific formats. -def SDT_MipsCallSeq : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>; -def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_MipsCallSeq, - [SDNPHasChain, SDNPOutFlag]>; -def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_MipsCallSeq, +def SDT_MipsCallSeq_start : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>; +def SDT_MipsCallSeq_end : SDTypeProfile<0, 2, [SDTCisVT<0, i32>, + SDTCisVT<1, i32>]>; + +def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_MipsCallSeq_start, [SDNPHasChain, SDNPOutFlag]>; +def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_MipsCallSeq_end, + [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; //===----------------------------------------------------------------------===// // Mips Instruction Predicate Definitions. @@ -348,9 +351,9 @@ let Defs = [SP], Uses = [SP] in { def ADJCALLSTACKDOWN : PseudoInstMips<(outs), (ins uimm16:$amt), "!ADJCALLSTACKDOWN $amt", [(callseq_start imm:$amt)]>; -def ADJCALLSTACKUP : PseudoInstMips<(outs), (ins uimm16:$amt), - "!ADJCALLSTACKUP $amt", - [(callseq_end imm:$amt)]>; +def ADJCALLSTACKUP : PseudoInstMips<(outs), (ins uimm16:$amt1, uimm16:$amt2), + "!ADJCALLSTACKUP $amt1", + [(callseq_end imm:$amt1, imm:$amt2)]>; } def IMPLICIT_DEF_CPURegs : PseudoInstMips<(outs CPURegs:$dst), (ins), |