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author | Eli Friedman <eli.friedman@gmail.com> | 2009-07-17 02:28:12 +0000 |
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committer | Eli Friedman <eli.friedman@gmail.com> | 2009-07-17 02:28:12 +0000 |
commit | 10a365910158a1c3749cd614f29109f78d62beec (patch) | |
tree | 469196c4e1c35dd6885035e51c689ee923f031cf /lib/Target/Mips | |
parent | 19c29f53f274870eb033389fd0ca98e6c98f03e0 (diff) | |
download | external_llvm-10a365910158a1c3749cd614f29109f78d62beec.zip external_llvm-10a365910158a1c3749cd614f29109f78d62beec.tar.gz external_llvm-10a365910158a1c3749cd614f29109f78d62beec.tar.bz2 |
Expand a bunch of illegal operations on MIPS (found by
inspection and running over CodeGen/Generic).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76146 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 0b10c9a..2fb6083 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -83,6 +83,9 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM) setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote); setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote); + // MIPS doesn't have extending float->double load (?) + setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); + // Used by legalize types to correctly generate the setcc result. // Without this, every float setcc comes with a AND/OR with the result, // we don't want this, since the fpcmp result goes to a flag register, @@ -120,11 +123,20 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM) setOperationAction(ISD::CTPOP, MVT::i32, Expand); setOperationAction(ISD::CTTZ, MVT::i32, Expand); setOperationAction(ISD::ROTL, MVT::i32, Expand); + setOperationAction(ISD::ROTR, MVT::i32, Expand); setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); + setOperationAction(ISD::FSIN, MVT::f32, Expand); + setOperationAction(ISD::FCOS, MVT::f32, Expand); + setOperationAction(ISD::FPOWI, MVT::f32, Expand); + setOperationAction(ISD::FPOW, MVT::f32, Expand); + setOperationAction(ISD::FLOG, MVT::f32, Expand); + setOperationAction(ISD::FLOG2, MVT::f32, Expand); + setOperationAction(ISD::FLOG10, MVT::f32, Expand); + setOperationAction(ISD::FEXP, MVT::f32, Expand); // We don't have line number support yet. setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand); |