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author | Nowar Gu <nowar100@gmail.com> | 2011-07-02 10:51:47 +0800 |
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committer | Nowar Gu <nowar100@gmail.com> | 2011-07-02 11:56:53 +0800 |
commit | 1ffcf07d9fb7a7db5737ca7307ae8e0aa713f278 (patch) | |
tree | 2a1da365fc2e4ec5afa50558016d70d204b0e92c /lib/Target/Mips | |
parent | f899bd4a462884aa91b9d0c93ab2dbc605dac116 (diff) | |
parent | 4b02915386046fa882a95553a7457ae7d05e9f27 (diff) | |
download | external_llvm-1ffcf07d9fb7a7db5737ca7307ae8e0aa713f278.zip external_llvm-1ffcf07d9fb7a7db5737ca7307ae8e0aa713f278.tar.gz external_llvm-1ffcf07d9fb7a7db5737ca7307ae8e0aa713f278.tar.bz2 |
Merge upstream to r134306 at Sat. 2nd July 2011.
Diffstat (limited to 'lib/Target/Mips')
-rw-r--r-- | lib/Target/Mips/CMakeLists.txt | 2 | ||||
-rw-r--r-- | lib/Target/Mips/Makefile | 2 | ||||
-rw-r--r-- | lib/Target/Mips/MipsInstrInfo.cpp | 4 | ||||
-rw-r--r-- | lib/Target/Mips/MipsInstrInfo.h | 5 | ||||
-rw-r--r-- | lib/Target/Mips/MipsSubtarget.cpp | 13 | ||||
-rw-r--r-- | lib/Target/Mips/MipsSubtarget.h | 9 |
6 files changed, 25 insertions, 10 deletions
diff --git a/lib/Target/Mips/CMakeLists.txt b/lib/Target/Mips/CMakeLists.txt index 71b13c8..2c35c36 100644 --- a/lib/Target/Mips/CMakeLists.txt +++ b/lib/Target/Mips/CMakeLists.txt @@ -5,7 +5,7 @@ tablegen(MipsGenInstrInfo.inc -gen-instr-info) tablegen(MipsGenAsmWriter.inc -gen-asm-writer) tablegen(MipsGenDAGISel.inc -gen-dag-isel) tablegen(MipsGenCallingConv.inc -gen-callingconv) -tablegen(MipsGenSubtarget.inc -gen-subtarget) +tablegen(MipsGenSubtargetInfo.inc -gen-subtarget) add_llvm_target(MipsCodeGen MipsAsmPrinter.cpp diff --git a/lib/Target/Mips/Makefile b/lib/Target/Mips/Makefile index 0b6dd56..eafcc4a 100644 --- a/lib/Target/Mips/Makefile +++ b/lib/Target/Mips/Makefile @@ -15,7 +15,7 @@ TARGET = Mips BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \ MipsGenAsmWriter.inc \ MipsGenDAGISel.inc MipsGenCallingConv.inc \ - MipsGenSubtarget.inc + MipsGenSubtargetInfo.inc DIRS = TargetInfo diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp index deab5e5..7d39be2 100644 --- a/lib/Target/Mips/MipsInstrInfo.cpp +++ b/lib/Target/Mips/MipsInstrInfo.cpp @@ -19,14 +19,14 @@ #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/Support/ErrorHandling.h" +#define GET_INSTRINFO_CTOR #define GET_INSTRINFO_MC_DESC #include "MipsGenInstrInfo.inc" using namespace llvm; MipsInstrInfo::MipsInstrInfo(MipsTargetMachine &tm) - : TargetInstrInfoImpl(MipsInsts, array_lengthof(MipsInsts), - Mips::ADJCALLSTACKDOWN, Mips::ADJCALLSTACKUP), + : MipsGenInstrInfo(Mips::ADJCALLSTACKDOWN, Mips::ADJCALLSTACKUP), TM(tm), RI(*TM.getSubtargetImpl(), *this) {} static bool isZeroImm(const MachineOperand &op) { diff --git a/lib/Target/Mips/MipsInstrInfo.h b/lib/Target/Mips/MipsInstrInfo.h index b7f8bec..d02fdc1 100644 --- a/lib/Target/Mips/MipsInstrInfo.h +++ b/lib/Target/Mips/MipsInstrInfo.h @@ -19,6 +19,9 @@ #include "llvm/Target/TargetInstrInfo.h" #include "MipsRegisterInfo.h" +#define GET_INSTRINFO_HEADER +#include "MipsGenInstrInfo.inc" + namespace llvm { namespace Mips { @@ -164,7 +167,7 @@ namespace MipsII { }; } -class MipsInstrInfo : public TargetInstrInfoImpl { +class MipsInstrInfo : public MipsGenInstrInfo { MipsTargetMachine &TM; const MipsRegisterInfo RI; public: diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp index 306ea11..a96f872 100644 --- a/lib/Target/Mips/MipsSubtarget.cpp +++ b/lib/Target/Mips/MipsSubtarget.cpp @@ -7,17 +7,23 @@ // //===----------------------------------------------------------------------===// // -// This file implements the Mips specific subclass of TargetSubtarget. +// This file implements the Mips specific subclass of TargetSubtargetInfo. // //===----------------------------------------------------------------------===// #include "MipsSubtarget.h" #include "Mips.h" -#include "MipsGenSubtarget.inc" + +#define GET_SUBTARGETINFO_CTOR +#define GET_SUBTARGETINFO_MC_DESC +#define GET_SUBTARGETINFO_TARGET_DESC +#include "MipsGenSubtargetInfo.inc" + using namespace llvm; MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool little) : + MipsGenSubtargetInfo(), MipsArchVersion(Mips1), MipsABI(O32), IsLittle(little), IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false), IsLinux(true), HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), HasMinMax(false), @@ -31,6 +37,9 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, // Parse features string. ParseSubtargetFeatures(FS, CPUName); + // Initialize scheduling itinerary for the specified CPU. + InstrItins = getInstrItineraryForCPU(CPUName); + // Is the target system Linux ? if (TT.find("linux") == std::string::npos) IsLinux = false; diff --git a/lib/Target/Mips/MipsSubtarget.h b/lib/Target/Mips/MipsSubtarget.h index 8acbf5b..ae76470 100644 --- a/lib/Target/Mips/MipsSubtarget.h +++ b/lib/Target/Mips/MipsSubtarget.h @@ -7,20 +7,23 @@ // //===----------------------------------------------------------------------===// // -// This file declares the Mips specific subclass of TargetSubtarget. +// This file declares the Mips specific subclass of TargetSubtargetInfo. // //===----------------------------------------------------------------------===// #ifndef MIPSSUBTARGET_H #define MIPSSUBTARGET_H -#include "llvm/Target/TargetSubtarget.h" +#include "llvm/Target/TargetSubtargetInfo.h" #include "llvm/MC/MCInstrItineraries.h" #include <string> +#define GET_SUBTARGETINFO_HEADER +#include "MipsGenSubtargetInfo.inc" + namespace llvm { -class MipsSubtarget : public TargetSubtarget { +class MipsSubtarget : public MipsGenSubtargetInfo { public: enum MipsABIEnum { |