diff options
author | Akira Hatanaka <ahatanaka@mips.com> | 2013-05-16 20:45:17 +0000 |
---|---|---|
committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-05-16 20:45:17 +0000 |
commit | 63451435402d9c401475596b6e741b5bbaad0bbd (patch) | |
tree | dfc84cac745bdaa5f5e84ddc97ae4fd0a70b4f46 /lib/Target/Mips | |
parent | ae06fa25421fa4d010183469f60aa21f2223ff8a (diff) | |
download | external_llvm-63451435402d9c401475596b6e741b5bbaad0bbd.zip external_llvm-63451435402d9c401475596b6e741b5bbaad0bbd.tar.gz external_llvm-63451435402d9c401475596b6e741b5bbaad0bbd.tar.bz2 |
[mips] Factor out unaligned store lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182050 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 24 |
1 files changed, 14 insertions, 10 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 45f1148..ed62da5 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -1999,16 +1999,8 @@ static SDValue createStoreLR(unsigned Opc, SelectionDAG &DAG, StoreSDNode *SD, } // Expand an unaligned 32 or 64-bit integer store node. -SDValue MipsTargetLowering::lowerSTORE(SDValue Op, SelectionDAG &DAG) const { - StoreSDNode *SD = cast<StoreSDNode>(Op); - EVT MemVT = SD->getMemoryVT(); - - // Return if store is aligned or if MemVT is neither i32 nor i64. - if ((SD->getAlignment() >= MemVT.getSizeInBits() / 8) || - ((MemVT != MVT::i32) && (MemVT != MVT::i64))) - return SDValue(); - - bool IsLittle = Subtarget->isLittle(); +static SDValue lowerUnalignedIntStore(StoreSDNode *SD, SelectionDAG &DAG, + bool IsLittle) { SDValue Value = SD->getValue(), Chain = SD->getChain(); EVT VT = Value.getValueType(); @@ -2035,6 +2027,18 @@ SDValue MipsTargetLowering::lowerSTORE(SDValue Op, SelectionDAG &DAG) const { return createStoreLR(MipsISD::SDR, DAG, SD, SDL, IsLittle ? 0 : 7); } +SDValue MipsTargetLowering::lowerSTORE(SDValue Op, SelectionDAG &DAG) const { + StoreSDNode *SD = cast<StoreSDNode>(Op); + EVT MemVT = SD->getMemoryVT(); + + // Lower unaligned integer stores. + if ((SD->getAlignment() < MemVT.getSizeInBits() / 8) && + ((MemVT == MVT::i32) || (MemVT == MVT::i64))) + return lowerUnalignedIntStore(SD, DAG, Subtarget->isLittle()); + + return SDValue(); +} + SDValue MipsTargetLowering::lowerADD(SDValue Op, SelectionDAG &DAG) const { if (Op->getOperand(0).getOpcode() != ISD::FRAMEADDR || cast<ConstantSDNode> |