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| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-05-08 19:38:04 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-05-08 19:38:04 +0000 |
| commit | b637b9f89e88e8c1ffe147634c1b2b297fb6edeb (patch) | |
| tree | 10c7697976315eed932aa508332138285d060d04 /lib/Target/Mips | |
| parent | 146f336272f442e8342ef9bbfa5f5937c4bb8d65 (diff) | |
| download | external_llvm-b637b9f89e88e8c1ffe147634c1b2b297fb6edeb.zip external_llvm-b637b9f89e88e8c1ffe147634c1b2b297fb6edeb.tar.gz external_llvm-b637b9f89e88e8c1ffe147634c1b2b297fb6edeb.tar.bz2 | |
[mips] Add instruction selection pattern for (seteq $LHS, 0).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181459 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 86ec729..3d31937 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -1263,6 +1263,8 @@ defm : BrcondPats<CPURegs, BEQ, BNE, SLT, SLTu, SLTi, SLTiu, ZERO>; // setcc patterns multiclass SeteqPats<RegisterClass RC, Instruction SLTiuOp, Instruction XOROp, Instruction SLTuOp, Register ZEROReg> { + def : MipsPat<(seteq RC:$lhs, 0), + (SLTiuOp RC:$lhs, 1)>; def : MipsPat<(seteq RC:$lhs, RC:$rhs), (SLTiuOp (XOROp RC:$lhs, RC:$rhs), 1)>; def : MipsPat<(setne RC:$lhs, RC:$rhs), |