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author | Chris Lattner <sabre@nondot.org> | 2010-04-02 20:16:16 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-04-02 20:16:16 +0000 |
commit | c7f3ace20c325521c68335a1689645b43b06ddf0 (patch) | |
tree | 901a5d915c2a5d1003a41c1001a637d2621d44f5 /lib/Target/Mips | |
parent | de4845c163a5847c82d7ce10ed0c320098bce6e0 (diff) | |
download | external_llvm-c7f3ace20c325521c68335a1689645b43b06ddf0.zip external_llvm-c7f3ace20c325521c68335a1689645b43b06ddf0.tar.gz external_llvm-c7f3ace20c325521c68335a1689645b43b06ddf0.tar.bz2 |
use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100214 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
-rw-r--r-- | lib/Target/Mips/MipsInstrInfo.cpp | 10 | ||||
-rw-r--r-- | lib/Target/Mips/MipsRegisterInfo.cpp | 3 |
2 files changed, 6 insertions, 7 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp index 85cf064..dbd3c24 100644 --- a/lib/Target/Mips/MipsInstrInfo.cpp +++ b/lib/Target/Mips/MipsInstrInfo.cpp @@ -123,7 +123,7 @@ isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const void MipsInstrInfo:: insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const { - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (MI != MBB.end()) DL = MI->getDebugLoc(); BuildMI(MBB, MI, DL, get(Mips::NOP)); } @@ -133,7 +133,7 @@ copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *DestRC, const TargetRegisterClass *SrcRC) const { - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (I != MBB.end()) DL = I->getDebugLoc(); @@ -191,7 +191,7 @@ void MipsInstrInfo:: storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC) const { - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (I != MBB.end()) DL = I->getDebugLoc(); if (RC == Mips::CPURegsRegisterClass) @@ -225,7 +225,7 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC) const { - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (I != MBB.end()) DL = I->getDebugLoc(); if (RC == Mips::CPURegsRegisterClass) @@ -523,7 +523,7 @@ InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond) const { // FIXME this should probably have a DebugLoc argument - DebugLoc dl = DebugLoc::getUnknownLoc(); + DebugLoc dl; // Shouldn't be a fall through. assert(TBB && "InsertBranch must not be told to insert a fallthrough"); assert((Cond.size() == 3 || Cond.size() == 2 || Cond.size() == 0) && diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp index f3c87bc..f43e69b 100644 --- a/lib/Target/Mips/MipsRegisterInfo.cpp +++ b/lib/Target/Mips/MipsRegisterInfo.cpp @@ -397,8 +397,7 @@ emitPrologue(MachineFunction &MF) const MachineFrameInfo *MFI = MF.getFrameInfo(); MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>(); MachineBasicBlock::iterator MBBI = MBB.begin(); - DebugLoc dl = (MBBI != MBB.end() ? - MBBI->getDebugLoc() : DebugLoc::getUnknownLoc()); + DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); bool isPIC = (MF.getTarget().getRelocationModel() == Reloc::PIC_); // Get the right frame order for Mips. |