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| author | Justin Holewinski <jholewinski@nvidia.com> | 2013-08-06 14:13:31 +0000 |
|---|---|---|
| committer | Justin Holewinski <jholewinski@nvidia.com> | 2013-08-06 14:13:31 +0000 |
| commit | a3635eefc749389aed84d9791fab657297203e1b (patch) | |
| tree | 613f5d28fe902b437c84eebdf89c60eb5f60c9ce /lib/Target/NVPTX/NVPTXInstrInfo.td | |
| parent | 82767327c59ede1f8663ec9b9a64a668993d501f (diff) | |
| download | external_llvm-a3635eefc749389aed84d9791fab657297203e1b.zip external_llvm-a3635eefc749389aed84d9791fab657297203e1b.tar.gz external_llvm-a3635eefc749389aed84d9791fab657297203e1b.tar.bz2 | |
[NVPTX] Fix bug in stack code generation causes by MC conversion
We do use a very small set of physical registers, so account for
them in the virtual register encoding between MachineInstr and MC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187799 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/NVPTX/NVPTXInstrInfo.td')
| -rw-r--r-- | lib/Target/NVPTX/NVPTXInstrInfo.td | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/lib/Target/NVPTX/NVPTXInstrInfo.td b/lib/Target/NVPTX/NVPTXInstrInfo.td index 8ce16e9..db91eb0 100644 --- a/lib/Target/NVPTX/NVPTXInstrInfo.td +++ b/lib/Target/NVPTX/NVPTXInstrInfo.td @@ -1321,6 +1321,15 @@ def MOV_ADDR64 : NVPTXInst<(outs Int64Regs:$dst), (ins imem:$a), "mov.u64 \t$dst, $a;", [(set Int64Regs:$dst, (Wrapper tglobaladdr:$a))]>; +// Get pointer to local stack +def MOV_DEPOT_ADDR + : NVPTXInst<(outs Int32Regs:$d), (ins i32imm:$num), + "mov.u32 \t$d, __local_depot$num;", []>; +def MOV_DEPOT_ADDR_64 + : NVPTXInst<(outs Int64Regs:$d), (ins i32imm:$num), + "mov.u64 \t$d, __local_depot$num;", []>; + + // copyPhysreg is hard-coded in NVPTXInstrInfo.cpp let IsSimpleMove=1 in { def IMOV1rr: NVPTXInst<(outs Int1Regs:$dst), (ins Int1Regs:$sss), |