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authorSanjiv Gupta <sanjiv.gupta@microchip.com>2009-01-21 05:44:05 +0000
committerSanjiv Gupta <sanjiv.gupta@microchip.com>2009-01-21 05:44:05 +0000
commit08b9b0521847cbe6c991fcd0e8c6c728525d268c (patch)
treefa76567fa35af4c2d7fe08a0035a8b5252f0dce4 /lib/Target/PIC16/PIC16InstrInfo.cpp
parentd1e8d9c0a5dc821b6b52f7872181edeeec5df7ba (diff)
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Implement LowerOperationWrapper for legalizer.
Also a few signed comparison fixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62665 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PIC16/PIC16InstrInfo.cpp')
-rw-r--r--lib/Target/PIC16/PIC16InstrInfo.cpp5
1 files changed, 2 insertions, 3 deletions
diff --git a/lib/Target/PIC16/PIC16InstrInfo.cpp b/lib/Target/PIC16/PIC16InstrInfo.cpp
index 47ac6d3..5fe5dac 100644
--- a/lib/Target/PIC16/PIC16InstrInfo.cpp
+++ b/lib/Target/PIC16/PIC16InstrInfo.cpp
@@ -138,9 +138,8 @@ bool PIC16InstrInfo::copyRegToReg (MachineBasicBlock &MBB,
}
bool PIC16InstrInfo::isMoveInstr(const MachineInstr &MI,
- unsigned &SrcReg, unsigned &DestReg,
- unsigned &SrcSubIdx, unsigned &DstSubIdx) const {
- SrcSubIdx = DstSubIdx = 0; // No sub-registers.
+ unsigned &SrcReg,
+ unsigned &DestReg) const {
if (MI.getOpcode() == PIC16::copy_fsr
|| MI.getOpcode() == PIC16::copy_w) {