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| author | Sanjiv Gupta <sanjiv.gupta@microchip.com> | 2008-05-14 11:31:39 +0000 |
|---|---|---|
| committer | Sanjiv Gupta <sanjiv.gupta@microchip.com> | 2008-05-14 11:31:39 +0000 |
| commit | 2010b3eea608c420337a94b18899e9e378913edb (patch) | |
| tree | bf88751f0f674e8c9193faf44ae20931d5d53448 /lib/Target/PIC16/PIC16InstrInfo.cpp | |
| parent | 6422e8aa1ca15e85302e601397d5d1fae7410ed4 (diff) | |
| download | external_llvm-2010b3eea608c420337a94b18899e9e378913edb.zip external_llvm-2010b3eea608c420337a94b18899e9e378913edb.tar.gz external_llvm-2010b3eea608c420337a94b18899e9e378913edb.tar.bz2 | |
Detabification. Fixed indentation and spacing.
Changed cout to DOUT, and TODOs to FIXMEs.
Other changes as per coding conventions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51105 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PIC16/PIC16InstrInfo.cpp')
| -rw-r--r-- | lib/Target/PIC16/PIC16InstrInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/PIC16/PIC16InstrInfo.cpp b/lib/Target/PIC16/PIC16InstrInfo.cpp index ad38382..9e61c2a 100644 --- a/lib/Target/PIC16/PIC16InstrInfo.cpp +++ b/lib/Target/PIC16/PIC16InstrInfo.cpp @@ -21,7 +21,7 @@ using namespace llvm; -// TODO: Add the subtarget support on this constructor. +// FIXME: Add the subtarget support on this constructor. PIC16InstrInfo::PIC16InstrInfo(PIC16TargetMachine &tm) : TargetInstrInfoImpl(PIC16Insts, array_lengthof(PIC16Insts)), TM(tm), RI(*this) {} @@ -87,7 +87,7 @@ storeRegToStackSlot(MachineBasicBlock &MBB, .addReg(SrcReg,false,false,true,true) .addExternalSymbol(tmpName) // the current printer expects 3 operands, .addExternalSymbol(tmpName); // all we need is actually one, - // so we repeat. + // so we repeat. } else assert(0 && "Can't store this register to stack slot"); @@ -120,7 +120,7 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, /// instructions inserted. unsigned PIC16InstrInfo:: InsertBranch(MachineBasicBlock &MBB, - MachineBasicBlock *TBB, MachineBasicBlock *FBB, + MachineBasicBlock *TBB, MachineBasicBlock *FBB, const std::vector<MachineOperand> &Cond) const { // Shouldn't be a fall through. @@ -134,7 +134,7 @@ InsertBranch(MachineBasicBlock &MBB, return 1; } - // TODO: If the there are some conditions specified then conditional branch + // FIXME: If the there are some conditions specified then conditional branch // should be generated. // For the time being no instruction is being generated therefore // returning NULL. |