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authorSanjiv Gupta <sanjiv.gupta@microchip.com>2008-05-13 09:02:57 +0000
committerSanjiv Gupta <sanjiv.gupta@microchip.com>2008-05-13 09:02:57 +0000
commit09bb420cf4975a6a51f7b1d03f029d76d4e9689a (patch)
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Adding files for Microchip's PIC16 target.
A brief description about PIC16: =============================== PIC16 is an 8-bit microcontroller with only one 8-bit register which is the accumulator. All arithmetic/load/store operations are 8-bit only. The architecture has two address spaces: program and data. The program memory is divided into 2K pages and the data memory is divided into banks of 128 byte, with only 80 usable bytes, resulting in an non-contiguous data memory. It supports direct data memory access (by specifying the address as part of the instruction) and indirect data and program memory access (in an unorthodox fashion which utilize a 16 bit pointer register). Two classes of registers exist: (8-bit class which is only one accumulator) (16-bit class, which contains one or more 16 bit pointer(s)) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51027 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PIC16/PIC16Subtarget.cpp')
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diff --git a/lib/Target/PIC16/PIC16Subtarget.cpp b/lib/Target/PIC16/PIC16Subtarget.cpp
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+++ b/lib/Target/PIC16/PIC16Subtarget.cpp
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+//===- PIC16Subtarget.cpp - PIC16 Subtarget Information -------------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements the PIC16 specific subclass of TargetSubtarget.
+//
+//===----------------------------------------------------------------------===//
+
+#include "PIC16Subtarget.h"
+#include "PIC16.h"
+#include "PIC16GenSubtarget.inc"
+using namespace llvm;
+
+PIC16Subtarget::PIC16Subtarget(const TargetMachine &TM, const Module &M,
+ const std::string &FS)
+ :IsPIC16Old(false)
+{
+ std::string CPU = "generic";
+
+ // Parse features string.
+ ParseSubtargetFeatures(FS, CPU);
+}