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| author | Chris Lattner <sabre@nondot.org> | 2005-08-24 23:08:16 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-08-24 23:08:16 +0000 |
| commit | 2b54400f085391a247dd2c3fffc9f36f7b2dc867 (patch) | |
| tree | c35e216bba16f85ddd92f354251bae5e090e6ef9 /lib/Target/PowerPC/PPCCodeEmitter.cpp | |
| parent | 7651fa4a7ed1c81abb004847af1eeb3beb9c88fd (diff) | |
| download | external_llvm-2b54400f085391a247dd2c3fffc9f36f7b2dc867.zip external_llvm-2b54400f085391a247dd2c3fffc9f36f7b2dc867.tar.gz external_llvm-2b54400f085391a247dd2c3fffc9f36f7b2dc867.tar.bz2 | |
Split IMPLICIT_DEF into IMPLICIT_DEF_GPR and IMPLICIT_DEF_FP, so that the
instructions take a consistent reg class. Implement ISD::UNDEF in the dag->dag
selector to generate this, fixing UnitTests/2003-07-06-IntOverflow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23028 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCCodeEmitter.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCCodeEmitter.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp index a52935a..25cbda5 100644 --- a/lib/Target/PowerPC/PPCCodeEmitter.cpp +++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp @@ -124,7 +124,8 @@ void PPC32CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) { default: emitWord(getBinaryCodeForInstr(*I)); break; - case PPC::IMPLICIT_DEF: + case PPC::IMPLICIT_DEF_GPR: + case PPC::IMPLICIT_DEF_FP: break; // pseudo opcode, no side effects case PPC::MovePCtoLR: assert(0 && "CodeEmitter does not support MovePCtoLR instruction"); |