aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/PowerPC/PPCCodeEmitter.cpp
diff options
context:
space:
mode:
authorStephen Hines <srhines@google.com>2013-05-02 16:19:29 -0700
committerStephen Hines <srhines@google.com>2013-05-02 16:19:29 -0700
commit38578c4919ea18ceb27e29988b2d857afe6215bf (patch)
tree6718ee1e6a1a59f46b6c847439ebfcd291c1e393 /lib/Target/PowerPC/PPCCodeEmitter.cpp
parentffb69c62ac54b0af5768ae9486b93b39a6c6b94c (diff)
parenta7a05ee70cb07f32996a0587a636b406c746b71b (diff)
downloadexternal_llvm-38578c4919ea18ceb27e29988b2d857afe6215bf.zip
external_llvm-38578c4919ea18ceb27e29988b2d857afe6215bf.tar.gz
external_llvm-38578c4919ea18ceb27e29988b2d857afe6215bf.tar.bz2
Merge remote-tracking branch 'upstream/master' into merge-20130502
Conflicts: lib/Support/Unix/Signals.inc unittests/Transforms/Utils/Cloning.cpp Change-Id: I027581a4390ec3ce4cd8d33da8b5f4c0c7d372c8
Diffstat (limited to 'lib/Target/PowerPC/PPCCodeEmitter.cpp')
-rw-r--r--lib/Target/PowerPC/PPCCodeEmitter.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp
index d68bfd1..6478718 100644
--- a/lib/Target/PowerPC/PPCCodeEmitter.cpp
+++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp
@@ -142,7 +142,7 @@ unsigned PPCCodeEmitter::get_crbitm_encoding(const MachineInstr &MI,
assert((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MTCRF8 ||
MI.getOpcode() == PPC::MFOCRF) &&
(MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7));
- return 0x80 >> getPPCRegisterNumbering(MO.getReg());
+ return 0x80 >> TM.getRegisterInfo()->getEncodingValue(MO.getReg());
}
MachineRelocation PPCCodeEmitter::GetRelocation(const MachineOperand &MO,
@@ -260,7 +260,7 @@ unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI,
assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MTCRF8 &&
MI.getOpcode() != PPC::MFOCRF) ||
MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7);
- return getPPCRegisterNumbering(MO.getReg());
+ return TM.getRegisterInfo()->getEncodingValue(MO.getReg());
}
assert(MO.isImm() &&