* Claim to support machine code emission - return false from

  addPassesToEmitMachineCode()
* Add support for registers and constants in getMachineOpValue()

This enables running "int main() { ret 0 }" via the PowerPC JIT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16983 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 26 insertions, 4 deletions

diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp
index bf6ea41..e33c8c1 100644
--- a/lib/Target/PowerPC/PPCCodeEmitter.cpp
+++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp
@@ -68,8 +68,7 @@ bool PPC32TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
   PM.add(new PPC32CodeEmitter(*this, MCE)); 
   // Delete machine code for this function after emitting it
   PM.add(createMachineCodeDeleter());
-  // We don't yet support machine code emission
-  return true;
+  return false;
 }
 
 bool PPC32CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
@@ -88,8 +87,31 @@ void PPC32CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
 
 int64_t PPC32CodeEmitter::getMachineOpValue(MachineInstr &MI, 
                                             MachineOperand &MO) {
-  abort();
-  return 0;
+  int64_t rv = 0; // Return value; defaults to 0 for unhandled cases
+                  // or things that get fixed up later by the JIT.
+  if (MO.isPCRelativeDisp()) {
+    std::cerr << "PPC32CodeEmitter: PC-relative disp unhandled\n";
+    abort();
+  } else if (MO.isRegister()) {
+    rv = MO.getReg();
+  } else if (MO.isImmediate()) {
+    rv = MO.getImmedValue();
+#if 0
+  } else if (MO.isGlobalAddress()) {
+  } else if (MO.isMachineBasicBlock()) {
+    MachineBasicBlock *MBB = MO.getMachineBasicBlock();
+  } else if (MO.isExternalSymbol()) {
+  } else if (MO.isFrameIndex()) {
+    unsigned index = MO.getFrameIndex();
+  } else if (MO.isConstantPoolIndex()) {
+    unsigned index = MO.getCosntantPoolIndex();
+#endif
+  } else {
+    std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
+    abort();
+  }
+
+  return rv;
 }