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| author | Hal Finkel <hfinkel@anl.gov> | 2013-08-14 20:05:04 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-08-14 20:05:04 +0000 |
| commit | 341c1a50adeadd848b2e73e9184d81331ee1cb92 (patch) | |
| tree | 7ef87c37606aa4bd9da6beb46b20c9da9bc421f9 /lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | fdb1a6c341c0e289f3f900cdab87f831262c0e93 (diff) | |
| download | external_llvm-341c1a50adeadd848b2e73e9184d81331ee1cb92.zip external_llvm-341c1a50adeadd848b2e73e9184d81331ee1cb92.tar.gz external_llvm-341c1a50adeadd848b2e73e9184d81331ee1cb92.tar.bz2 | |
Actually fix PPC64 64-bit GPR inline asm constraint matching
This is a follow-up to r187693, correcting that code to request the correct
register class. The previous version, with the wrong register class, was not
really correcting the constraints, but rather was removing them. Coincidentally,
this fixed the failing test case in r187693, but obviously created other
problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188407 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 886def1..2a28d73 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -7591,7 +7591,7 @@ PPCTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, PPC::GPRCRegClass.contains(R.first)) { const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); return std::make_pair(TRI->getMatchingSuperReg(R.first, - PPC::sub_32, &PPC::GPRCRegClass), + PPC::sub_32, &PPC::G8RCRegClass), &PPC::G8RCRegClass); } |