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| author | Mon P Wang <wangmp@apple.com> | 2008-06-25 08:15:39 +0000 |
|---|---|---|
| committer | Mon P Wang <wangmp@apple.com> | 2008-06-25 08:15:39 +0000 |
| commit | 6bde9ec4129ed4b265c5b172cfe9b34d1e0247d2 (patch) | |
| tree | 55754230852c1d76c8058edec38ed42a47b3ddc7 /lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | 35e2c0e675b20b860e720a07027449eefefeb325 (diff) | |
| download | external_llvm-6bde9ec4129ed4b265c5b172cfe9b34d1e0247d2.zip external_llvm-6bde9ec4129ed4b265c5b172cfe9b34d1e0247d2.tar.gz external_llvm-6bde9ec4129ed4b265c5b172cfe9b34d1e0247d2.tar.bz2 | |
Added MemOperands to Atomic operations since Atomics touches memory.
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index d4f8241..9432a74 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -204,12 +204,12 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Custom); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64 , Custom); - setOperationAction(ISD::ATOMIC_LAS , MVT::i32 , Custom); - setOperationAction(ISD::ATOMIC_LCS , MVT::i32 , Custom); + setOperationAction(ISD::ATOMIC_LOAD_ADD , MVT::i32 , Custom); + setOperationAction(ISD::ATOMIC_CMP_SWAP , MVT::i32 , Custom); setOperationAction(ISD::ATOMIC_SWAP , MVT::i32 , Custom); if (TM.getSubtarget<PPCSubtarget>().has64BitSupport()) { - setOperationAction(ISD::ATOMIC_LAS , MVT::i64 , Custom); - setOperationAction(ISD::ATOMIC_LCS , MVT::i64 , Custom); + setOperationAction(ISD::ATOMIC_LOAD_ADD , MVT::i64 , Custom); + setOperationAction(ISD::ATOMIC_CMP_SWAP , MVT::i64 , Custom); setOperationAction(ISD::ATOMIC_SWAP , MVT::i64 , Custom); } @@ -2721,7 +2721,7 @@ SDOperand PPCTargetLowering::LowerDYNAMIC_STACKALLOC(SDOperand Op, return DAG.getNode(PPCISD::DYNALLOC, VTs, Ops, 3); } -SDOperand PPCTargetLowering::LowerAtomicLAS(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerAtomicLOAD_ADD(SDOperand Op, SelectionDAG &DAG) { MVT VT = Op.Val->getValueType(0); SDOperand Chain = Op.getOperand(0); SDOperand Ptr = Op.getOperand(1); @@ -2757,7 +2757,7 @@ SDOperand PPCTargetLowering::LowerAtomicLAS(SDOperand Op, SelectionDAG &DAG) { OutOps, 2); } -SDOperand PPCTargetLowering::LowerAtomicLCS(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerAtomicCMP_SWAP(SDOperand Op, SelectionDAG &DAG) { MVT VT = Op.Val->getValueType(0); SDOperand Chain = Op.getOperand(0); SDOperand Ptr = Op.getOperand(1); @@ -3942,8 +3942,8 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG, PPCSubTarget); - case ISD::ATOMIC_LAS: return LowerAtomicLAS(Op, DAG); - case ISD::ATOMIC_LCS: return LowerAtomicLCS(Op, DAG); + case ISD::ATOMIC_LOAD_ADD: return LowerAtomicLOAD_ADD(Op, DAG); + case ISD::ATOMIC_CMP_SWAP: return LowerAtomicCMP_SWAP(Op, DAG); case ISD::ATOMIC_SWAP: return LowerAtomicSWAP(Op, DAG); case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); |