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authorOwen Anderson <resistor@mac.com>2009-08-10 20:18:46 +0000
committerOwen Anderson <resistor@mac.com>2009-08-10 20:18:46 +0000
commita4509893aacf06a14f470c0981aa90b7248423a8 (patch)
treecfb50700dbfb66a3834b50a532858dae940624c7 /lib/Target/PowerPC/PPCISelLowering.cpp
parent8697cd2f2808cd34f31027b24e60233db1668ec0 (diff)
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Continue the SimpleValueType-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78593 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 54b9ee6..a63bacd 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -283,7 +283,7 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
// will selectively turn on ones that can be effectively codegen'd.
for (unsigned i = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++i) {
- MVT VT = (MVT::SimpleValueType)i;
+ MVT::SimpleValueType VT = (MVT::SimpleValueType)i;
// add/sub are legal for all supported vector VT's.
setOperationAction(ISD::ADD , VT, Legal);