diff options
| author | Hal Finkel <hfinkel@anl.gov> | 2012-08-04 14:10:46 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-08-04 14:10:46 +0000 |
| commit | 8cc3474f72388836fa4ca7d3622289fb9ee08b41 (patch) | |
| tree | ff2efb5d8b676af7332ad5a3df07759354943f3f /lib/Target/PowerPC/PPCInstr64Bit.td | |
| parent | ad62e92279bc0b14c54db94dd794082c8b8edd9e (diff) | |
| download | external_llvm-8cc3474f72388836fa4ca7d3622289fb9ee08b41.zip external_llvm-8cc3474f72388836fa4ca7d3622289fb9ee08b41.tar.gz external_llvm-8cc3474f72388836fa4ca7d3622289fb9ee08b41.tar.bz2 | |
Add readcyclecounter lowering on PPC64.
On PPC64, this can be done with a simple TableGen pattern.
To enable this, I've added the (otherwise missing) readcyclecounter
SDNode definition to TargetSelectionDAG.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161302 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstr64Bit.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstr64Bit.td | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td index 91c5366..92a5051 100644 --- a/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/lib/Target/PowerPC/PPCInstr64Bit.td @@ -265,6 +265,11 @@ def MTCTR8 : XFXForm_7_ext<31, 467, 9, (outs), (ins G8RC:$rS), PPC970_DGroup_First, PPC970_Unit_FXU; } +let Pattern = [(set G8RC:$rT, readcyclecounter)] in +def MFTB8 : XFXForm_1_ext<31, 371, 268, (outs G8RC:$rT), (ins), + "mftb $rT", SprMFTB>, + PPC970_DGroup_First, PPC970_Unit_FXU; + let Defs = [X1], Uses = [X1] in def DYNALLOC8 : Pseudo<(outs G8RC:$result), (ins G8RC:$negsize, memri:$fpsi),"", [(set G8RC:$result, |