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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2012-11-13 19:19:46 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2012-11-13 19:19:46 +0000 |
| commit | 4ff09818a945978920e9209a45db98fc6093101b (patch) | |
| tree | d618fb7f39d1cb5cd0afc28dd04be606e87074d2 /lib/Target/PowerPC/PPCInstrFormats.td | |
| parent | 18430436cad62d6215e1c07cba2059f6eecb7657 (diff) | |
| download | external_llvm-4ff09818a945978920e9209a45db98fc6093101b.zip external_llvm-4ff09818a945978920e9209a45db98fc6093101b.tar.gz external_llvm-4ff09818a945978920e9209a45db98fc6093101b.tar.bz2 | |
Fix wrong PowerPC instruction encodings due to
operand field name mismatches in:
- AForm_3 (fmul, fmuls)
- XFXForm_5 (mtcrf)
- XFLForm (mtfsf)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167862 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrFormats.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrFormats.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td index 523fa1e..c3c171c 100644 --- a/lib/Target/PowerPC/PPCInstrFormats.td +++ b/lib/Target/PowerPC/PPCInstrFormats.td @@ -626,9 +626,9 @@ class XFXForm_5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin> : I<opcode, OOL, IOL, asmstr, itin> { bits<8> FXM; - bits<5> ST; + bits<5> rS; - let Inst{6-10} = ST; + let Inst{6-10} = rS; let Inst{11} = 0; let Inst{12-19} = FXM; let Inst{20} = 0; @@ -667,7 +667,7 @@ class XFLForm<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, string cstr, InstrItinClass itin, list<dag>pattern> : I<opcode, OOL, IOL, asmstr, itin> { bits<8> FM; - bits<5> RT; + bits<5> rT; bit RC = 0; // set by isDOT let Pattern = pattern; @@ -676,7 +676,7 @@ class XFLForm<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, let Inst{6} = 0; let Inst{7-14} = FM; let Inst{15} = 0; - let Inst{16-20} = RT; + let Inst{16-20} = rT; let Inst{21-30} = xo; let Inst{31} = RC; } |
