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author | Chris Lattner <sabre@nondot.org> | 2005-04-19 04:59:28 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2005-04-19 04:59:28 +0000 |
commit | 57226fbc7b84e78ee2563734c628563811743bc8 (patch) | |
tree | 9e3fc9c4916259bf4977df5822ed8100c5eee84a /lib/Target/PowerPC/PPCInstrFormats.td | |
parent | e19d0b11308a6026a58954c283d4de9d568fb33a (diff) | |
download | external_llvm-57226fbc7b84e78ee2563734c628563811743bc8.zip external_llvm-57226fbc7b84e78ee2563734c628563811743bc8.tar.gz external_llvm-57226fbc7b84e78ee2563734c628563811743bc8.tar.bz2 |
Convert over DForm and DSForm instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21348 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrFormats.td')
-rw-r--r-- | lib/Target/PowerPC/PPCInstrFormats.td | 65 |
1 files changed, 32 insertions, 33 deletions
diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td index 721014c..d0aef6d 100644 --- a/lib/Target/PowerPC/PPCInstrFormats.td +++ b/lib/Target/PowerPC/PPCInstrFormats.td @@ -90,8 +90,8 @@ class BForm_ext<bits<6> opcode, bit aa, bit lk, bits<5> bo, bits<2> bicode, } // 1.7.4 D-Form -class DForm_base<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> - : I<opcode, ppc64, vmx, OL, asmstr> { +class DForm_base<bits<6> opcode, dag OL, string asmstr> + : I<opcode, 0, 0, OL, asmstr> { bits<5> A; bits<5> B; bits<16> C; @@ -101,8 +101,8 @@ class DForm_base<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> let Inst{16-31} = C; } -class DForm_1<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> - : I<opcode, ppc64, vmx, OL, asmstr> { +class DForm_1<bits<6> opcode, dag OL, string asmstr> + : I<opcode, 0, 0, OL, asmstr> { bits<5> A; bits<16> C; bits<5> B; @@ -112,11 +112,11 @@ class DForm_1<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> let Inst{16-31} = C; } -class DForm_2<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> - : DForm_base<opcode, ppc64, vmx, OL, asmstr>; +class DForm_2<bits<6> opcode, dag OL, string asmstr> + : DForm_base<opcode, OL, asmstr>; -class DForm_2_r0<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> - : I<opcode, ppc64, vmx, OL, asmstr> { +class DForm_2_r0<bits<6> opcode, dag OL, string asmstr> + : I<opcode, 0, 0, OL, asmstr> { bits<5> A; bits<16> B; @@ -126,11 +126,11 @@ class DForm_2_r0<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> } // Currently we make the use/def reg distinction in ISel, not tablegen -class DForm_3<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> - : DForm_1<opcode, ppc64, vmx, OL, asmstr>; +class DForm_3<bits<6> opcode, dag OL, string asmstr> + : DForm_1<opcode, OL, asmstr>; -class DForm_4<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> - : I<opcode, ppc64, vmx, OL, asmstr> { +class DForm_4<bits<6> opcode, dag OL, string asmstr> + : I<opcode, 0, 0, OL, asmstr> { bits<5> B; bits<5> A; bits<16> C; @@ -140,15 +140,15 @@ class DForm_4<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> let Inst{16-31} = C; } -class DForm_4_zero<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> - : DForm_1<opcode, ppc64, vmx, OL, asmstr> { +class DForm_4_zero<bits<6> opcode, dag OL, string asmstr> + : DForm_1<opcode, OL, asmstr> { let A = 0; let B = 0; let C = 0; } -class DForm_5<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> - : I<opcode, ppc64, vmx, OL, asmstr> { +class DForm_5<bits<6> opcode, dag OL, string asmstr> + : I<opcode, 0, 0, OL, asmstr> { bits<3> BF; bits<1> L; bits<5> RA; @@ -161,30 +161,30 @@ class DForm_5<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> let Inst{16-31} = I; } -class DForm_5_ext<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> - : DForm_5<opcode, ppc64, vmx, OL, asmstr> { - let L = ppc64; +class DForm_5_ext<bits<6> opcode, dag OL, string asmstr> + : DForm_5<opcode, OL, asmstr> { + let L = PPC64; } -class DForm_6<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> - : DForm_5<opcode, ppc64, vmx, OL, asmstr>; +class DForm_6<bits<6> opcode, dag OL, string asmstr> + : DForm_5<opcode, OL, asmstr>; -class DForm_6_ext<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> - : DForm_6<opcode, ppc64, vmx, OL, asmstr> { - let L = ppc64; +class DForm_6_ext<bits<6> opcode, dag OL, string asmstr> + : DForm_6<opcode, OL, asmstr> { + let L = PPC64; } -class DForm_8<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> - : DForm_1<opcode, ppc64, vmx, OL, asmstr> { +class DForm_8<bits<6> opcode, dag OL, string asmstr> + : DForm_1<opcode, OL, asmstr> { } -class DForm_9<bits<6> opcode, bit ppc64, bit vmx, dag OL, string asmstr> - : DForm_1<opcode, ppc64, vmx, OL, asmstr> { +class DForm_9<bits<6> opcode, dag OL, string asmstr> + : DForm_1<opcode, OL, asmstr> { } // 1.7.5 DS-Form -class DSForm_1<bits<6> opcode, bits<2> xo, bit ppc64, bit vmx, - dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> { +class DSForm_1<bits<6> opcode, bits<2> xo, dag OL, string asmstr> + : I<opcode, 0, 0, OL, asmstr> { bits<5> RST; bits<14> DS; bits<5> RA; @@ -195,9 +195,8 @@ class DSForm_1<bits<6> opcode, bits<2> xo, bit ppc64, bit vmx, let Inst{30-31} = xo; } -class DSForm_2<bits<6> opcode, bits<2> xo, bit ppc64, bit vmx, - dag OL, string asmstr> - : DSForm_1<opcode, xo, ppc64, vmx, OL, asmstr>; +class DSForm_2<bits<6> opcode, bits<2> xo, dag OL, string asmstr> + : DSForm_1<opcode, xo, OL, asmstr>; // 1.7.6 X-Form class XForm_base_r3xo<bits<6> opcode, bits<10> xo, bit rc, |