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author | Chris Lattner <sabre@nondot.org> | 2007-12-30 20:49:49 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2007-12-30 20:49:49 +0000 |
commit | a96056a6649e5df71d673e058aa559b80df273ec (patch) | |
tree | 87d9f35ded3a067f2d7aa4d17bfe0e362fb0f17d /lib/Target/PowerPC/PPCInstrInfo.cpp | |
parent | 3a36a9e9c5f3a14eaa95e5c33e611eaed84203d4 (diff) | |
download | external_llvm-a96056a6649e5df71d673e058aa559b80df273ec.zip external_llvm-a96056a6649e5df71d673e058aa559b80df273ec.tar.gz external_llvm-a96056a6649e5df71d673e058aa559b80df273ec.tar.bz2 |
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45453 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrInfo.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.cpp | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index 944d20d..b20943e 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -54,7 +54,7 @@ bool PPCInstrInfo::isMoveInstr(const MachineInstr& MI, MI.getOperand(0).isRegister() && MI.getOperand(2).isImmediate() && "invalid PPC ADDI instruction!"); - if (MI.getOperand(1).isRegister() && MI.getOperand(2).getImmedValue()==0) { + if (MI.getOperand(1).isRegister() && MI.getOperand(2).getImm() == 0) { sourceReg = MI.getOperand(1).getReg(); destReg = MI.getOperand(0).getReg(); return true; @@ -65,7 +65,7 @@ bool PPCInstrInfo::isMoveInstr(const MachineInstr& MI, MI.getOperand(1).isRegister() && MI.getOperand(2).isImmediate() && "invalid PPC ORI instruction!"); - if (MI.getOperand(2).getImmedValue()==0) { + if (MI.getOperand(2).getImm() == 0) { sourceReg = MI.getOperand(1).getReg(); destReg = MI.getOperand(0).getReg(); return true; @@ -99,7 +99,7 @@ unsigned PPCInstrInfo::isLoadFromStackSlot(MachineInstr *MI, case PPC::LWZ: case PPC::LFS: case PPC::LFD: - if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImmedValue() && + if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImm() && MI->getOperand(2).isFrameIndex()) { FrameIndex = MI->getOperand(2).getFrameIndex(); return MI->getOperand(0).getReg(); @@ -117,7 +117,7 @@ unsigned PPCInstrInfo::isStoreToStackSlot(MachineInstr *MI, case PPC::STW: case PPC::STFS: case PPC::STFD: - if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImmedValue() && + if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImm() && MI->getOperand(2).isFrameIndex()) { FrameIndex = MI->getOperand(2).getFrameIndex(); return MI->getOperand(0).getReg(); @@ -135,7 +135,7 @@ MachineInstr *PPCInstrInfo::commuteInstruction(MachineInstr *MI) const { return TargetInstrInfo::commuteInstruction(MI); // Cannot commute if it has a non-zero rotate count. - if (MI->getOperand(3).getImmedValue() != 0) + if (MI->getOperand(3).getImm() != 0) return 0; // If we have a zero rotate count, we have: @@ -162,10 +162,10 @@ MachineInstr *PPCInstrInfo::commuteInstruction(MachineInstr *MI) const { MI->getOperand(1).unsetIsKill(); // Swap the mask around. - unsigned MB = MI->getOperand(4).getImmedValue(); - unsigned ME = MI->getOperand(5).getImmedValue(); - MI->getOperand(4).setImmedValue((ME+1) & 31); - MI->getOperand(5).setImmedValue((MB-1) & 31); + unsigned MB = MI->getOperand(4).getImm(); + unsigned ME = MI->getOperand(5).getImm(); + MI->getOperand(4).setImm((ME+1) & 31); + MI->getOperand(5).setImm((MB-1) & 31); return MI; } |