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author | Arnold Schwaighofer <arnold.schwaighofer@gmail.com> | 2008-04-30 09:16:33 +0000 |
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committer | Arnold Schwaighofer <arnold.schwaighofer@gmail.com> | 2008-04-30 09:16:33 +0000 |
commit | a0032726c05cbb509988f05746de940adcbdf20d (patch) | |
tree | 7a4da70d35c785bd6bd03768b4bf7ba3c42e24d2 /lib/Target/PowerPC/PPCInstrInfo.td | |
parent | 21ecd91d4b61fea006cd674a1e51d99a69b85d26 (diff) | |
download | external_llvm-a0032726c05cbb509988f05746de940adcbdf20d.zip external_llvm-a0032726c05cbb509988f05746de940adcbdf20d.tar.gz external_llvm-a0032726c05cbb509988f05746de940adcbdf20d.tar.bz2 |
Tail call optimization improvements:
Move platform independent code (lowering of possibly overwritten
arguments, check for tail call optimization eligibility) from
target X86ISelectionLowering.cpp to TargetLowering.h and
SelectionDAGISel.cpp.
Initial PowerPC tail call implementation:
Support ppc32 implemented and tested (passes my tests and
test-suite llvm-test).
Support ppc64 implemented and half tested (passes my tests).
On ppc tail call optimization is performed if
caller and callee are fastcc
call is a tail call (in tail call position, call followed by ret)
no variable argument lists or byval arguments
option -tailcallopt is enabled
Supported:
* non pic tail calls on linux/darwin
* module-local tail calls on linux(PIC/GOT)/darwin(PIC)
* inter-module tail calls on darwin(PIC)
If constraints are not met a normal call will be emitted.
A test checking the argument lowering behaviour on x86-64 was added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50477 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrInfo.td')
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index a765494..04968ed 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -42,6 +42,7 @@ def SDT_PPCstbrx : SDTypeProfile<0, 4, [ SDTCisVT<0, i32>, SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT> ]>; + def SDT_PPClarx : SDTypeProfile<1, 2, [ SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisVT<2, i32> ]>; @@ -52,6 +53,10 @@ def SDT_PPCcmp_unres : SDTypeProfile<0, 3, [ SDTCisSameAs<0, 1>, SDTCisInt<1>, SDTCisVT<2, i32> ]>; +def SDT_PPCTC_ret : SDTypeProfile<0, 2, [ + SDTCisPtrTy<0>, SDTCisVT<1, i32> +]>; + //===----------------------------------------------------------------------===// // PowerPC specific DAG Nodes. // @@ -121,6 +126,12 @@ def PPCbctrl_ELF : SDNode<"PPCISD::BCTRL_ELF", SDTNone, def retflag : SDNode<"PPCISD::RET_FLAG", SDTNone, [SDNPHasChain, SDNPOptInFlag]>; +def PPCtc_return : SDNode<"PPCISD::TC_RETURN", SDT_PPCTC_ret, + [SDNPHasChain, SDNPOptInFlag]>; + +def PPCtailcall : SDNode<"PPCISD::TAILCALL", SDT_PPCCall, + [SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>; + def PPCvcmp : SDNode<"PPCISD::VCMP" , SDT_PPCvcmp, []>; def PPCvcmp_o : SDNode<"PPCISD::VCMPo", SDT_PPCvcmp, [SDNPOutFlag]>; @@ -453,6 +464,46 @@ let isCall = 1, PPC970_Unit = 7, [(PPCbctrl_ELF)]>, Requires<[In32BitMode]>; } + +let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in +def TCRETURNdi :Pseudo< (outs), + (ins calltarget:$dst, i32imm:$offset, variable_ops), + "#TC_RETURNd $dst $offset", + []>; + + +let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in +def TCRETURNai :Pseudo<(outs), (ins aaddr:$func, i32imm:$offset, variable_ops), + "#TC_RETURNa $func $offset", + [(PPCtc_return (i32 imm:$func), imm:$offset)]>; + +let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in +def TCRETURNri : Pseudo<(outs), (ins CTRRC:$dst, i32imm:$offset, variable_ops), + "#TC_RETURNr $dst $offset", + []>; + + +let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7, isBranch = 1, + isIndirectBranch = 1, isCall = 1, isReturn = 1 in +def TAILBCTR : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>, + Requires<[In32BitMode]>; + + + +let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7, + isBarrier = 1, isCall = 1, isReturn = 1 in +def TAILB : IForm<18, 0, 0, (outs), (ins calltarget:$dst), + "b $dst", BrB, + []>; + + +let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7, + isBarrier = 1, isCall = 1, isReturn = 1 in +def TAILBA : IForm<18, 0, 0, (outs), (ins aaddr:$dst), + "ba $dst", BrB, + []>; + + // DCB* instructions. def DCBA : DCB_Form<758, 0, (outs), (ins memrr:$dst), "dcba $dst", LdStDCBF, [(int_ppc_dcba xoaddr:$dst)]>, @@ -1211,6 +1262,18 @@ def : Pat<(PPCcall_ELF (i32 tglobaladdr:$dst)), def : Pat<(PPCcall_ELF (i32 texternalsym:$dst)), (BL_ELF texternalsym:$dst)>; + +def : Pat<(PPCtc_return (i32 tglobaladdr:$dst), imm:$imm), + (TCRETURNdi tglobaladdr:$dst, imm:$imm)>; + +def : Pat<(PPCtc_return (i32 texternalsym:$dst), imm:$imm), + (TCRETURNdi texternalsym:$dst, imm:$imm)>; + +def : Pat<(PPCtc_return CTRRC:$dst, imm:$imm), + (TCRETURNri CTRRC:$dst, imm:$imm)>; + + + // Hi and Lo for Darwin Global Addresses. def : Pat<(PPChi tglobaladdr:$in, 0), (LIS tglobaladdr:$in)>; def : Pat<(PPClo tglobaladdr:$in, 0), (LI tglobaladdr:$in)>; |