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| author | Nate Begeman <natebegeman@mac.com> | 2005-12-16 09:19:13 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2005-12-16 09:19:13 +0000 |
| commit | f492f9901aa9e6c5d1005f0c244be233d296d046 (patch) | |
| tree | cfb844019f8c2b5e879b8bde6740dec57be3dd1a /lib/Target/PowerPC/PPCInstrInfo.td | |
| parent | 0647bf69653df8f8f15e938341fe6e63daf5c3b6 (diff) | |
| download | external_llvm-f492f9901aa9e6c5d1005f0c244be233d296d046.zip external_llvm-f492f9901aa9e6c5d1005f0c244be233d296d046.tar.gz external_llvm-f492f9901aa9e6c5d1005f0c244be233d296d046.tar.bz2 | |
Add a second vector type to the VRRC register class, and fix some patterns
so that tablegen can infer all types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24746 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrInfo.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 4ec8fe3..225017c 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -946,11 +946,11 @@ def : Pat<(or (shl GPRC:$rS, GPRC:$rB), (srl GPRC:$rS, (sub 32, GPRC:$rB))), (RLWNM GPRC:$rS, GPRC:$rB, 0, 31)>; -def : Pat<(zext GPRC:$in), +def : Pat<(i64 (zext GPRC:$in)), (RLDICL (OR4To8 GPRC:$in, GPRC:$in), 0, 32)>; -def : Pat<(anyext GPRC:$in), +def : Pat<(i64 (anyext GPRC:$in)), (OR4To8 GPRC:$in, GPRC:$in)>; -def : Pat<(trunc G8RC:$in), +def : Pat<(i32 (trunc G8RC:$in)), (OR8To4 G8RC:$in, G8RC:$in)>; // SHL |