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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-01-18 23:52:19 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-01-18 23:52:19 +0000 |
commit | 71f0fc1ca88965b69b4b2c8794a7144bc93d4bba (patch) | |
tree | 74d90f8e2fc12215de756277e0b66154c392e64f /lib/Target/PowerPC/PPCMCInstLower.cpp | |
parent | 9cf37e8b48732fccd4c301ed51aafed7074bd84e (diff) | |
download | external_llvm-71f0fc1ca88965b69b4b2c8794a7144bc93d4bba.zip external_llvm-71f0fc1ca88965b69b4b2c8794a7144bc93d4bba.tar.gz external_llvm-71f0fc1ca88965b69b4b2c8794a7144bc93d4bba.tar.bz2 |
Ignore register mask operands when lowering instructions to MC.
This is similar to implicit register operands. MC doesn't understand
register liveness and call clobbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148437 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCMCInstLower.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCMCInstLower.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCMCInstLower.cpp b/lib/Target/PowerPC/PPCMCInstLower.cpp index 33af426..ff6ebba 100644 --- a/lib/Target/PowerPC/PPCMCInstLower.cpp +++ b/lib/Target/PowerPC/PPCMCInstLower.cpp @@ -166,6 +166,8 @@ void llvm::LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, MCOp = GetSymbolRef(MO,AP.GetBlockAddressSymbol(MO.getBlockAddress()),AP, isDarwin); break; + case MachineOperand::MO_RegisterMask: + continue; } OutMI.addOperand(MCOp); |