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| author | Chris Lattner <sabre@nondot.org> | 2010-02-09 19:54:29 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-02-09 19:54:29 +0000 |
| commit | 4052b296030e3523b9a4a8d1e4a9af9091a8d7e8 (patch) | |
| tree | 92b8684baa417c83b197e4abeaf1ab3f06930cbb /lib/Target/PowerPC/PPCRegisterInfo.cpp | |
| parent | e560a78d3626c2accf49cf38f3c90c53d516b9a0 (diff) | |
| download | external_llvm-4052b296030e3523b9a4a8d1e4a9af9091a8d7e8.zip external_llvm-4052b296030e3523b9a4a8d1e4a9af9091a8d7e8.tar.gz external_llvm-4052b296030e3523b9a4a8d1e4a9af9091a8d7e8.tar.bz2 | |
move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCRegisterInfo.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index ad2cdcf..20e77e7 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -724,7 +724,7 @@ PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, } // Take into account whether it's an add or mem instruction unsigned OffsetOperandNo = (FIOperandNo == 2) ? 1 : 2; - if (MI.getOpcode() == TargetInstrInfo::INLINEASM) + if (MI.isInlineAsm()) OffsetOperandNo = FIOperandNo-1; // Get the frame index. @@ -817,7 +817,7 @@ PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, // addi 0:rA 1:rB, 2, imm ==> add 0:rA, 1:rB, 2:r0 unsigned OperandBase; - if (OpC != TargetInstrInfo::INLINEASM) { + if (OpC != TargetOpcode::INLINEASM) { assert(ImmToIdxMap.count(OpC) && "No indexed form of load or store available!"); unsigned NewOpcode = ImmToIdxMap.find(OpC)->second; |